Tsuyoshi YAMADA


An MPEG2 Video Decoder LSI with Hierarchical Control Mechanism
Shin-ichi URAMOTO Akihiko TAKABATAKE Takashi HASHIMOTO Jun TAKEDA Gen-ichi TANAKA Tsuyoshi YAMADA Yukio KODAMA Atsushi MAEDA Toshiaki SHIMADA Shun-ichi SEKIGUCHI Tokumichi MURAKAMI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/12/25
Vol. E78-C  No. 12  pp. 1697-1708
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia)
Category: 
Keyword: 
image compressionvideo decoderMPEG2
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