Tsuyoshi NISHIKAWA


A 160 mW, 80 nA Standby, MPEG-4 Audiovisual LSI with 16 Mbit Embedded DRAM and a 5 GOPS Post Filtering Unit
Hideho ARAKIDA Masafumi TAKAHASHI Yoshiro TSUBOI Tsuyoshi NISHIKAWA Hideaki YAMAMOTO Toshihide FUJIYOSHI Yoshiyuki KITASHO Yasuyuki UEDA Tetsuya FUJITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 475-481
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
MPEG-4 codec LSIdigital signal processing
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