Toshiyuki TAKEWAKI

Accurate Modeling Method for Cu Interconnect
Kenta YAMADA  Hiroshi KITAHARA  Yoshihiko ASAI  Hideo SAKAMOTO  Norio OKADA  Makoto YASUDA  Noriaki ODA  Michio SAKURAI  Masayuki HIROI  Toshiyuki TAKEWAKI  Sadayuki OHNISHI  Manabu IGUCHI  Hiroyasu MINDA  Mieko SUZUKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/06/01
Vol. E91-C  No. 6  pp. 968-977
Type of Manuscript: PAPER
Category: Semiconductor Materials and Devices
Keyword: 
Cu,  interconnect,  cross-section,  modeling, 
  Summary |  Full Text:PDF (2.5MB)
Chip-Level Performance Improvement Using Triple Damascene Wiring Design Concept for the 0.13 µm CMOS Generation and Beyond
Noriaki ODA  Hiroyuki KUNISHIMA  Takashi KYOUNO  Kazuhiro TAKEDA  Tomoaki TANAKA  Toshiyuki TAKEWAKI  Masahiro IKEDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1544-1550
Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
copper,  CMOS,  damascene,  design, 
  Summary |  Full Text:PDF (1.4MB)
Characterizing Film Quality and Electromigration Resistance of Giant-Grain Copper Interconnects
Takahisa NITTA  Tadahiro OHMI  Tsukasa HOSHI  Toshiyuki TAKEWAKI  Tadashi SHIBATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/04/20
Vol. E76-C  No. 4  pp. 626-634
Type of Manuscript: Special Section PAPER (Special Issue on Sub-Half Micron Si Device and Process Technologies)
Category: Process Technology
Keyword: 
copper interconnects,  giant-grain,  electromigration,  low-kinetic-energy ion bombardment process, 
  Summary |  Full Text:PDF (794.6KB)