Toshiyuki MAEDA


A Statistical Quality Model for Delay Testing
Yasuo SATO Shuji HAMADA Toshiyuki MAEDA Atsuo TAKATORI Seiji KAJIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 349-355
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Signal Integrity and Variability
Keyword: 
delay testingquality modeldefect distribution
 Summary | Full Text:PDF(933.9KB)

Test Generation for Sequential Circuits under IDDQ Testing
Toshiyuki MAEDA Yoshinobu HIGAMI Kozo KINOSHITA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1998/07/25
Vol. E81-D  No. 7  pp. 689-696
Type of Manuscript:  Special Section PAPER (Special Issue on Test and Diagnosis of VLSI)
Category: IDDQ Testing
Keyword: 
sequential circuittest generationIDDQ testingbridging fault
 Summary | Full Text:PDF(707.5KB)