Toshinori MORIHARA

A Continuous-Adaptive DDRx Interface with Flexible Round-Trip-Time and Full Self Loop-Backed AC Test
Masaru HARAGUCHI  Tokuya OSAWA  Akira YAMAZAKI  Chikayoshi MORISHIMA  Toshinori MORIHARA  Yoshikazu MOROOKA  Yoshihiro OKUNO  Kazutami ARIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 453-459
Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
DDR interface,  SoC,  round-trip-time,  loop-backed test, 
  Summary |  Full Text:PDF (2.1MB)
An Embedded DRAM Hybrid Macro with Auto Signal Management and Enhanced-on-Chip Tester
Naoya WATANABE  Fukashi MORISHITA  Yasuhiko TAITO  Akira YAMAZAKI  Tetsushi TANIZAKI  Katsumi DOSAKA  Yoshikazu MOROOKA  Futoshi IGAUE  Katsuya FURUE  Yoshihiro NAGURA  Tatsunori KOMOIKE  Toshinori MORIHARA  Atsushi HACHISUKA  Kazutami ARIMOTO  Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 624-634
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
embedded DRAM,  various DRAM macros,  low voltage operation,  short TAT,  BIST, 
  Summary |  Full Text:PDF (5.2MB)