Tomohiko OGAWA

Design for Testability That Reduces Linearity Testing Time of SAR ADCs
Tomohiko OGAWA  Haruo KOBAYASHI  Satoshi UEMORI  Yohei TAN  Satoshi ITO  Nobukazu TAKAI  Takahiro J. YAMAGUCHI  Kiichi NIITSU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 1061-1064
Type of Manuscript: BRIEF PAPER
Category: 
Keyword: 
SAR ADC,  testing,  DC linearity,  design for testability,  built-in self-test, 
  Summary |  Full Text:PDF (463.4KB)
SAR ADC Algorithm with Redundancy and Digital Error Correction
Tomohiko OGAWA  Haruo KOBAYASHI  Yosuke TAKAHASHI  Nobukazu TAKAI  Masao HOTTA  Hao SAN  Tatsuji MATSUURA  Akira ABE  Katsuyoshi YAGI  Toshihiko MORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2  pp. 415-423
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
SAR ADC,  digital error correction,  non-binary,  redundancy, 
  Summary |  Full Text:PDF (631.6KB)