IEICE SEARCH SYSTEM

Tetsuya MATSUMURA

Physical Design Methodology for On-Chip 64-Mb DRAM MPEG-2 Encoding with a Multimedia Processor Hidehiro TAKATA Rei AKIYAMA Tadao YAMANAKA Haruyuki OHKUMA Yasue SUETSUGU Toshihiro KANAOKA Satoshi KUMAKI Kazuya ISHIHARA Atsuo HANAMI Tetsuya MATSUMURA Tetsuya WATANABE Yoshihide AJIOKA Yoshio MATSUDA Syuhei IWADE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2002/02/01 Vol. E85-C No. 2 pp. 368-374 Type of Manuscript: Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors) Category: Product Designs Keyword: multimedia processor, clock skew, cross-talk noise, IR drop, MPEG-2 encoder,
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An Embedded Software Scheme for a Real-Time Single-Chip MPEG-2 Encoder System with a VLIW Media Processor Core Hiroshi SEGAWA Yoshinori MATSUURA Satoshi KUMAKI Tetsuya MATSUMURA Stefan SCOTZNIOVSKY Shu MURAYAMA Tetsuro WADA Ayako HARADA Eiji OHARA Ken-ichi ASANO Toyohiko YOSHIDA Yasutaka HORIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/02/01 Vol. E84-C No. 2 pp. 202-211 Type of Manuscript: Special Section PAPER (Special Issue on Low-Power High-Performance VLSI Processors and Technologies) Category: Keyword: video encoder, MPEG-2, media-processor, audio encoder, system encoder, embedded software,
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A Single-Chip MPEG-2 422P@ML Video, Audio, and System Encoder with a 162 MHz Media-Processor Core and Dual Motion Estimation Cores Tetsuya MATSUMURA Satoshi KUMAKI Hiroshi SEGAWA Kazuya ISHIHARA Atsuo HANAMI Yoshinori MATSUURA Stefan SCOTZNIOVSKY Hidehiro TAKATA Akira YAMADA Shu MURAYAMA Tetsuro WADA Hideo OHIRA Toshiaki SHIMADA Ken-ichi ASANO Toyohiko YOSHIDA Masahiko YOSHIMOTO Koji TSUCHIHASHI Yasutaka HORIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2001/01/01 Vol. E84-C No. 1 pp. 108-122 Type of Manuscript: PAPER Category: Integrated Electronics Keyword: video encoder, MPEG-2, media-processor, audio encoder, system encoder, motion estimation,
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An Architectural Study of an MPEG-2 422P@HL Encoder Chip Set Ayako HARADA Shin-ichi HATTORI Tadashi KASEZAWA Hidenori SATO Tetsuya MATSUMURA Satoshi KUMAKI Kazuya ISHIHARA Hiroshi SEGAWA Atsuo HANAMI Yoshinori MATSUURA Ken-ichi ASANO Toyohiko YOSHIDA Masahiko YOSHIMOTO Tokumichi MURAKAMI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/08/20 Vol. E83-A No. 8 pp. 1614-1623 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Implementations of Signal Processing Systems Keyword: video compression, video encoder, MPEG-2, HDTV, motion estimation,
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A Real-Time MPEG2 Encoding and Decoding Architecture with a Dual-Issue RISC Processor Akira YAMADA Toyohiko YOSHIDA Tetsuya MATSUMURA Shin-ichi URAMOTO Koji TSUCHIHASHI Edgar HOLMANN
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/20 Vol. E81-C No. 9 pp. 1382-1390 Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: multimedia processor, media processor, VLIW, MPEG, microprocessor,
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A Chip Set for Programmable Real-Time MPEG2 MP@ML Video Encoder Tetsuya MATSUMURA Hiroshi SEGAWA Satoshi KUMAKI Yoshinori MATSUURA Atsuo HANAMI Kazuya ISHIHARA Shin-ichi NAKAGAWA Tadashi KASEZAWA Yoshihide AJIOKA Atsushi MAEDA Masahiko YOSHIMOTO Tadashi SUMI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/05/20 Vol. E81-C No. 5 pp. 680-694 Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs) Category: Keyword: video compression/decompression, video encoder, MPEG2, video signal processor,
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ULSI Realization of MPEG2 Realtime Video Encoder and Decoder--An Overview Masahiko YOSHIMOTO Shin-ichi NAKAGAWA Tetsuya MATSUMURA Kazuya ISHIHARA Shin-ichi URAMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/12/20 Vol. E78-C No. 12 pp. 1668-1681 Type of Manuscript: INVITED PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia) Category: Keyword: video compression/decompression, video encoder, video decoder, MPEG2, video signal processor,
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A High-Performance Reconfigurable Line Memory Macrocell for Video Signal Processing ASICs Tetsuya MATSUMURA Masahiko YOSHIMOTO Atsushi MAEDA Yasutaka HORIBA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1991/11/20 Vol. E74-C No. 11 pp. 3787-3795 Type of Manuscript: Special Section PAPER (Special Issue on the High Performance ASIC and Microprocessor) Category: Core and Macrocells Keyword:
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