Taro FUKUNAGA


A 90 mW MPEG-4 Video Codec LSI with the Capability for Core Profile
Takashi HASHIMOTO  Shunichi KUROMARU  Masayoshi TOUJIMA  Yasuo KOHASHI  Masatoshi MATSUO  Toshihiro MORIIWA  Masahiro OHASHI  Tsuyoshi NAKAMURA  Mana HAMADA  Yuji SUGISAWA  Miki KUROMARU  Tomonori YONEZAWA  Satoshi KAJITA  Takahiro KONDO  Hiroki OTSUKI  Kohkichi HASHIMOTO  Hiromasa NAKAJIMA  Taro FUKUNAGA  Hiroaki TOIDA  Yasuo IIZUKA  Hitoshi FUJIMOTO  Junji MICHIYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/07/01
Vol. E86-C  No. 7  pp. 1374-1384
Type of Manuscript: PAPER
Category: Integrated Electronics
Keyword: 
MPEG-4 visualcore profilehybrid architectureclock gatingembedded DRAMlow power
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