Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A
No. 12
pp. 3666-3670
Type of Manuscript: Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: Interconnect
Keyword:
interconnect,
delay variation,
parasitic capacitance,
SoC,
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