Takeshi YOSHIMURA


Framework and VLSI Architecture of Measurement-Domain Intra Prediction for Compressively Sensed Visual Contents
Jianbin ZHOU Dajiang ZHOU Li GUO Takeshi YOSHIMURA Satoshi GOTO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2869-2877
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
compressed sensingintra predictionstructured measurement matrixmeasurement-domain prediction
 Summary | Full Text:PDF(3.2MB)

An Efficient Multi-Level Algorithm for 3D-IC TSV Assignment
Cong HAO Takeshi YOSHIMURA 
Publication:   
Publication Date: 2017/03/01
Vol. E100-A  No. 3  pp. 776-784
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
3D-ICTSV assignmentmulti commodity flow
 Summary | Full Text:PDF(1.6MB)

Real-Time UHD Background Modelling with Mixed Selection Block Updates
Axel BEAUGENDRE Satoshi GOTO Takeshi YOSHIMURA 
Publication:   
Publication Date: 2017/02/01
Vol. E100-A  No. 2  pp. 581-591
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: IMAGE PROCESSING
Keyword: 
UHD4Kbackground modellingdetectionMBBM
 Summary | Full Text:PDF(4.4MB)

High Performance VLSI Architecture of H.265/HEVC Intra Prediction for 8K UHDTV Video Decoder
Jianbin ZHOU Dajiang ZHOU Shihao WANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12  pp. 2519-2527
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
HEVC/H.265 decoderintra predictionVLSI architecture8K UHDTV
 Summary | Full Text:PDF(2.2MB)

Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding
Shihao WANG Dajiang ZHOU Jianbin ZHOU Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7  pp. 1356-1365
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
UHDTVH.265/HEVCparameter decodermotion vectorboundary strength
 Summary | Full Text:PDF(3.6MB)

Mobility Overlap-Removal-Based Leakage Power and Register-Aware Scheduling in High-Level Synthesis
Nan WANG Song CHEN Wei ZHONG Nan LIU Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/08/01
Vol. E97-A  No. 8  pp. 1709-1719
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
mobility overlap removaldual-Vthleakage powerregister usagehigh-level synthesis
 Summary | Full Text:PDF(1.9MB)

Leakage Power Aware Scheduling in High-Level Synthesis
Nan WANG Song CHEN Cong HAO Haoran ZHANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/04/01
Vol. E97-A  No. 4  pp. 940-951
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
dual-Vthleakage powermax-flow min-cut
 Summary | Full Text:PDF(2MB)

Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips
Wei ZHONG Song CHEN Bo HUANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1174-1184
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
networks on chip (NoC)topology synthesisfloorplanning
 Summary | Full Text:PDF(2.4MB)

Resource-Aware Multi-Layer Floorplanning for Partially Reconfigurable FPGAs
Nan LIU Song CHEN Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 501-510
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
resource-awaremulti-layer floorlanningreconfigurable
 Summary | Full Text:PDF(1.5MB)

Floorplanning for High Utilization of Heterogeneous FPGAs
Nan LIU Song CHEN Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/09/01
Vol. E95-A  No. 9  pp. 1529-1537
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
field programmable gate arrayfloorplanninghigh utilization
 Summary | Full Text:PDF(3.4MB)

Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips
Wei ZHONG Takeshi YOSHIMURA Bei YU Song CHEN Sheqin DONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 534-545
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
networks on chip (NoC)placementsynthesistopology
 Summary | Full Text:PDF(2MB)

Redundant via Insertion: Removing Design Rule Conflicts and Balancing via Density
Song CHEN Jianwei SHEN Wei GUO Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2372-2379
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
redundant viadouble viadesign for manufacturabilityvia density
 Summary | Full Text:PDF(1.2MB)

Lagrangian Relaxation Based Inter-Layer Signal Via Assignment for 3-D ICs
Song CHEN Liangwei GE Mei-Fang CHIANG Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4  pp. 1080-1087
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
three dimensional integrated circuitsthrough-the-silicon viavia assignment
 Summary | Full Text:PDF(256.2KB)

Data Transmission on AM Broadcast with Acoustic OFDM
Yusuke NAKASHIMA Hosei MATSUOKA Takeshi YOSHIMURA Hiroshi MIURA Seiichi NAKAJIMA Masanori MACHIDA Gen-ichiro OHTA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/10/01
Vol. E91-B  No. 10  pp. 3149-3156
Type of Manuscript:  Special Section PAPER (Special Section on Next-Generation Mobile Multimedia Communications)
Category: 
Keyword: 
MF AM broadcastradiodata transmissionAcoustic OFDMaudio water-marking
 Summary | Full Text:PDF(1.2MB)

Acoustic OFDM System and Performance Analysis
Hosei MATSUOKA Yusuke NAKASHIMA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/07/01
Vol. E91-A  No. 7  pp. 1652-1658
Type of Manuscript:  Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks)
Category: 
Keyword: 
acoustic communicationOFDM
 Summary | Full Text:PDF(446.3KB)

Max-Flow Scheduling in High-Level Synthesis
Liangwei GE Song CHEN Kazutoshi WAKABAYASHI Takashi TAKENAKA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/09/01
Vol. E90-A  No. 9  pp. 1940-1948
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
schedulinghigh-level synthesispower-ground integrity
 Summary | Full Text:PDF(932.4KB)

Score Sequence Pair Problems of (r11, r12, r22)-Tournaments--Determination of Realizability--
Masaya TAKAHASHI Takahiro WATANABE Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/02/01
Vol. E90-D  No. 2  pp. 440-448
Type of Manuscript:  Special Section PAPER (Special Section on Foundations of Computer Science)
Category: Graph Algorithms
Keyword: 
algorithmgraph theoryprescribed degreesscore sequencetournament
 Summary | Full Text:PDF(446.7KB)

Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs
Yuichi NAKAMURA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3458-3463
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification
Keyword: 
SoCpower consumptionpower estimationtoggle rate
 Summary | Full Text:PDF(724.2KB)

An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs
Yuichi NAKAMURA Ko YOSHIKAWA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3351-3357
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
logic designengineering change orderspartitioning
 Summary | Full Text:PDF(658.2KB)

Timing Optimization Methodology Based on Replacing Flip-Flops by Latches
Ko YOSHIKAWA Keisuke KANAMARU Yasuhiko HAGIHARA Shigeto INUI Yuichi NAKAMURA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3151-3158
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
logic synthesissequential circuittiming optimizationlevel-sensitive latchformal verification
 Summary | Full Text:PDF(402.1KB)

Mobile Broadcast Streaming Service and Protocols on Unidirectional Radio Channels
Takeshi YOSHIMURA Tomoyuki OHYA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2004/09/01
Vol. E87-B  No. 9  pp. 2596-2604
Type of Manuscript:  Special Section PAPER (Special Section on Networking Technologies for Mobile Internet Systems)
Category: Multicast/Broadcast
Keyword: 
multimedia streamingbroadcastunidirectional channel
 Summary | Full Text:PDF(1.7MB)

Content Delivery Network Architecture for Mobile Streaming Service Enabled by SMIL Modification
Takeshi YOSHIMURA Yoshifumi YONEMOTO Tomoyuki OHYA Minoru ETOH Susie WEE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2003/06/01
Vol. E86-B  No. 6  pp. 1778-1787
Type of Manuscript:  Special Section PAPER (Special Issue on Content Delivery Networks)
Category: CDN Architecture
Keyword: 
CDNmobile networkstreaming mediaSMIL
 Summary | Full Text:PDF(3.2MB)

A Minimum Bandwidth Guaranteed Service Model and Its Implementation on Wireless Packet Scheduler
Mooryong JEONG Takeshi YOSHIMURA Hiroyuki MORIKAWA Tomonori AOYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/07/01
Vol. E85-A  No. 7  pp. 1463-1471
Type of Manuscript:  Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks)
Category: 
Keyword: 
service modelwireless packet schedulingminimum bandwidthresidual service share
 Summary | Full Text:PDF(951KB)

Multiple-Reference Compression of RTP/UDP/IP Headers for Mobile Multimedia Communications
Takeshi YOSHIMURA Toshiro KAWAHARA Tomoyuki OHYA Minoru ETOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/07/01
Vol. E85-A  No. 7  pp. 1491-1500
Type of Manuscript:  Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks)
Category: 
Keyword: 
mobile networkmultimedia communicationRTPheader compression
 Summary | Full Text:PDF(1.7MB)

Logic Minimization for Large-Scale Networks Based on Multi-Signal Implications
Masayuki YUGUCHI Kazutoshi WAKABAYASHI Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/11/25
Vol. E82-A  No. 11  pp. 2390-2397
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
logic synthesislogic minimizationimplicationimplication graph
 Summary | Full Text:PDF(613.5KB)

FOREWORD
Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/12/25
Vol. E79-A  No. 12  pp. 2085-2085
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF(65.7KB)

FOREWORD
Winfried HAHN Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10  pp. 1615-1616
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF(131.3KB)