Takashi KURAFUJI

Selective-Sets Resizable Cache Memory Design for High-Performance and Low-Power CPU Core
Takashi KURAFUJI  Yasunobu NAKASE  Hidehiro TAKATA  Yukinaga IMAMURA  Rei AKIYAMA  Tadao YAMANAKA  Atsushi IWABU  Shutarou YASUDA  Toshitsugu MIWA  Yasuhiro NUNOMURA  Niichi ITOH  Tetsuya KAGEMOTO  Nobuharu YOSHIOKA  Takeshi SHIBAGAKI  Hiroyuki KONDO  Masayuki KOYAMA  Takahiko ARAKAWA  Shuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 535-542
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
resizable cache,  selective-sets,  hierarchy SRAM,  partial swing, 
  Summary |  Full Text:PDF (794.8KB)
Signal Integrity Design and Analysis for a 400 MHz RISC Microcontroller
Akira YAMADA  Yasuhiro NUNOMURA  Hiroaki SUZUKI  Hisakazu SATO  Niichi ITOH  Tetsuya KAGEMOTO  Hironobu ITO  Takashi KURAFUJI  Nobuharu YOSHIOKA  Jingo NAKANISHI  Hiromi NOTANI  Rei AKIYAMA  Atsushi IWABU  Tadao YAMANAKA  Hidehiro TAKATA  Takeshi SHIBAGAKI  Takahiko ARAKAWA  Hiroshi MAKINO  Osamu TOMISAWA  Shuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2003/04/01
Vol. E86-C  No. 4  pp. 635-642
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance, Low-Power System LSIs and Related Technologies)
Category: Design Methods and Implementation
Keyword: 
microcontroller,  high-speed,  signal integrity,  IR drop,  design technique, 
  Summary |  Full Text:PDF (1.9MB)