Takahiro SHIMADA


A Wide Range 1.0-3.6 V 200 Mbps, Push-Pull Output Buffer Using Parasitic Bipolar Transistors
Takahiro SHIMADA  Hiromi NOTANI  Yasunobu NAKASE  Hiroshi MAKINO  Shuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 571-577
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
low power consumptionI/Oparasitic bipolar transistorforward biasdriverlevel converter
  Summary |  Full Text:PDF (739.9KB)