Tadashi NAGAYAMA


A Bipolar Divided Word-Line Scheme for a High-Speed and Large-Capacity BiCMOS SRAM
Takakuni DOUSEKI Tadashi NAGAYAMA Yasuo OHMORI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/11/25
Vol. E75-C  No. 11  pp. 1364-1368
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
BiCMOSECL interfaceSRAMECL-CMOS
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