Syuhei IWADE


Physical Design Methodology for On-Chip 64-Mb DRAM MPEG-2 Encoding with a Multimedia Processor
Hidehiro TAKATA  Rei AKIYAMA  Tadao YAMANAKA  Haruyuki OHKUMA  Yasue SUETSUGU  Toshihiro KANAOKA  Satoshi KUMAKI  Kazuya ISHIHARA  Atsuo HANAMI  Tetsuya MATSUMURA  Tetsuya WATANABE  Yoshihide AJIOKA  Yoshio MATSUDA  Syuhei IWADE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2  pp. 368-374
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Product Designs
Keyword: 
multimedia processorclock skewcross-talk noiseIR dropMPEG-2 encoder
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