Shiro DOSHO


A 500 MHz-BW -52.5 dB-THD Voltage-to-Time Converter Utilizing Two-Step Transition Inverter Delay Lines in 28 nm CMOS
Takuji MIKI Noriyuki MIURA Kento MIZUTA Shiro DOSHO Makoto NAGATA 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6  pp. 560-567
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
Voltage-to-Time converter (VTC)time domain processingCMOStwo-step transitiontrip voltage
 Summary | Full Text:PDF(1.5MB)

A Time-Domain Architecture and Design Method of High Speed A-to-D Converters with Standard Cells
Masao TAKAYAMA Shiro DOSHO Noriaki TAKEDA Masaya MIYAHARA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6  pp. 813-819
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
time-domain architecturetime-to-digital converterinterleavingsuccessive approximation
 Summary | Full Text:PDF(2.6MB)

Continuous-Time Delta-Sigma Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey
Shiro DOSHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 978-998
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
modulatorintegratorconverterstabilitydesign method
 Summary | Full Text:PDF(4.3MB)

Digital Calibration and Correction Methods for CMOS Analog-to-Digital Converters
Shiro DOSHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 421-431
Type of Manuscript:  INVITED PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
analog circuitsMoore's lawhigh performancesystem LSIsminiaturizationdigital calibrationcorrection
 Summary | Full Text:PDF(1.8MB)

FOREWORD
Shiro DOSHO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/02/01
Vol. E95-A  No. 2  pp. 429-429
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF(90KB)

A Low Distortion 3rd-Order Continuous-Time Delta-Sigma Modulator for a Worldwide Digital TV-Receiver
Koji OBATA Kazuo MATSUKAWA Yosuke MITANI Masao TAKAYAMA Yusuke TOKUNAGA Shiro SAKIYAMA Shiro DOSHO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/02/01
Vol. E95-A  No. 2  pp. 471-478
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
continuous-timedelta sigma modulatorharmonic distortiontuning system
 Summary | Full Text:PDF(3.1MB)

An Ultra-Wide Range Digitally Adaptive Control Phase Locked Loop with New 3-Phase Switched Capacitor Loop Filter
Shiro DOSHO Naoshi YANAGISAWA Kazuaki SOGAWA Yuji YAMADA Takashi MORIE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1197-1202
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
loop filterswitched capacitorphase locked loopdigital controladaptive control
 Summary | Full Text:PDF(2.7MB)

A -90 dBc@10 kHz Phase Noise Fractional-N Frequency Synthesizer with Accurate Loop Bandwidth Control Circuit
Shiro DOSHO Takashi MORIE Koji OKAMOTO Yuuji YAMADA Kazuaki SOGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6  pp. 739-745
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
synthesizerfractional-Nbandwidth-control0.13 µm-CMOS
 Summary | Full Text:PDF(1.2MB)

A Design of Compact PLL with Adaptive Active Loop Filter Circuit
Shiro DOSHO Naoshi YANAGISAWA Masaomi TOYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6  pp. 949-955
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
PLLadaptive biasingLPFcompact0.15 µm-CMOS
 Summary | Full Text:PDF(750.5KB)

Development of a CMOS Data Recovery PLL for DVD-ROMx14
Shiro DOSHO Naoshi YANAGISAWA Seiji WATANABE Takahiro BOKUI Kazuhiko NISHIKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4  pp. 764-769
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
DVD-ROMdata recoveryjitter detectorlow powerfrequency detector
 Summary | Full Text:PDF(537.1KB)

An Oversampling ADC with Non-linear Quantizer for PCM CODEC
Shiro SAKIYAMA George HAYASHI Shiro DOSHO Masakatsu MARUYAMA Seizo INAGAKI Masatoshi MATSUSHITA Kouji MOCHIZUKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/12/25
Vol. E78-C  No. 12  pp. 1754-1760
Type of Manuscript:  Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia)
Category: 
Keyword: 
ITU-T G712oversamplingADCQuantizerSNRnoise-shapingΔΣ
 Summary | Full Text:PDF(749KB)