Shinya ABE

Statistical Timing Analysis Considering Clock Jitter and Skew due to Power Supply Noise and Process Variation
Takashi ENAMI  Shinyu NINOMIYA  Ken-ichi SHINKAI  Shinya ABE  Masanori HASHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2399-2408
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
statistical timing analysis,  clock jitter,  setup verification,  structural correlation,  power supply noise, 
  Summary |  Full Text:PDF (962.9KB)
Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution
Shinya ABE  Masanori HASHIMOTO  Takao ONOYE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12  pp. 3481-3487
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
mesh-style clock distribution,  clock skew, 
  Summary |  Full Text:PDF (499.4KB)