Shinnosuke YOSHIDA


An Effective Suspicious Timing-Error Prediction Circuit Insertion Algorithm Minimizing Area Overhead
Shinnosuke YOSHIDA Youhua SHI Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7  pp. 1406-1418
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
timing-error predictionrobust designdelay variationoverclocking
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