Shimpei SATO


ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment
Shimpei SATO Ryohei KOBAYASHI Kenji KISE 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 344-353
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology and Platform
Keyword: 
hardware description languageRTL modelingRTL simulation
 Summary | Full Text:PDF(831.3KB)

An FPGA Realization of a Random Forest with k-Means Clustering Using a High-Level Synthesis Design
Akira JINGUJI Shimpei SATO Hiroki NAKAHARA 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 354-362
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Emerging Applications
Keyword: 
machine learningrandom forestk-means clusteringFPGA
 Summary | Full Text:PDF(1.4MB)

A Threshold Neuron Pruning for a Binarized Deep Neural Network on an FPGA
Tomoya FUJII Shimpei SATO Hiroki NAKAHARA 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2  pp. 376-386
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Emerging Applications
Keyword: 
machine learningdeep learningpruningFPGA
 Summary | Full Text:PDF(1.2MB)