Shigetoshi MURAMATSU

A 1.5 V, 200 MHz, 400 MIPS, 188 µA/MHz and 1.2 V, 300 MHz, 600 MIPS, 169 µA/MHz Digital Signal Processor Core for 3G Wireless Applications
Hiroshi TAKAHASHI  Shigeshi ABIKO  Kenichi TASHIRO  Kaoru AWAKA  Yutaka TOYONOH  Rimon IKENO  Shigetoshi MURAMATSU  Yasumasa IKEZAKI  Tsuyoshi TANAKA  Akihiro TAKEGAMA  Hiroshi KIMIZUKA  Hidehiko NITTA  Miki KOJIMA  Masaharu SUZUKI  James Lowell LARIMER 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 491-501
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
200 MHz,  300 MHz,  400 MIPS,  600 MIPS,  high-speed,  low-power,  fixed point DSP,  130 nm, 
  Summary |  Full Text:PDF (2.4MB)
A 100 MIPS High Speed and Low Power Digital Signal Processor
Hiroshi TAKAHASHI  Shigeshi ABIKO  Shintaro MIZUSHIMA  Yuji OZAWA  Kenichi TASHIRO  Shigetoshi MURAMATSU  Masahiro FUSUMADA  Akemi TODOROKI  Youichi TANAKA  Masayasu ITOIGAWA  Isao MORIOKA  Hiroyuki MIZUNO  Miki KOJIMA  Giovanni NASO  Emmanuel EGO  Frank CHIRAT 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/20
Vol. E80-C  No. 12  pp. 1546-1552
Type of Manuscript: Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
100 MIPS,  digital signal processing,  high speed,  low power,  CPU, 
  Summary |  Full Text:PDF (751.3KB)