SeongHwan CHO


An Ultra Low Power and Variation Tolerant GEN2 RFID Tag Front-End with Novel Clock-Free Decoder
Sung-Jin KIM Minchang CHO SeongHwan CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6  pp. 785-795
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
EPCglobalClass 1Generation 2RFIDRFID tagpulse interval encodedpassivelow powerPIE decodercalibration
 Summary | Full Text:PDF(7.1MB)

A Low-Jitter Area-Efficient LC-VCO Based Clock Generator in 0.13-µm CMOS
Joonhee LEE Sungjun KIM Sehyung JEON Woojae LEE SeongHwan CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 589-591
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
clock generatorLC-VCOarea-efficient LC-VCO
 Summary | Full Text:PDF(297.7KB)