Senling WANG


A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line
Yoshinobu HIGAMI Senling WANG Hiroshi TAKAHASHI Shin-ya KOBAYASHI Kewal K. SALUJA 
Publication:   
Publication Date: 2017/09/01
Vol. E100-D  No. 9  pp. 2224-2227
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
fault diagnosisbridging faultsclock lines
 Summary | Full Text:PDF(554.2KB)

Scan-Out Power Reduction for Logic BIST
Senling WANG Yasuo SATO Seiji KAJIHARA Kohei MIYASE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/09/01
Vol. E96-D  No. 9  pp. 2012-2020
Type of Manuscript:  Special Section PAPER (Special Section on Dependable Computing)
Category: 
Keyword: 
low powerBISTmulti-cycle testshift power
 Summary | Full Text:PDF(2.2MB)