Satoshi GOTO


Distortion Control and Optimization for Lossy Embedded Compression in Video Codec System
Li GUO Dajiang ZHOU Shinji KIMURA Satoshi GOTO 
Publication:   
Publication Date: 2017/11/01
Vol. E100-A  No. 11  pp. 2416-2424
Type of Manuscript:  PAPER
Category: Coding Theory
Keyword: 
lossy embedded compressionmemory-traffic-to-distortion optimizationdistortion controlframe-levelfixed data reduction ratio
 Summary | Full Text:PDF(3MB)

A 7-Die 3D Stacked 3840×2160@120 fps Motion Estimation Processor
Shuping ZHANG Jinjia ZHOU Dajiang ZHOU Shinji KIMURA Satoshi GOTO 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3  pp. 223-231
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
3D IC designmotion estimation processorhamburger architecturememory stacking
 Summary | Full Text:PDF(1.6MB)

Real-Time UHD Background Modelling with Mixed Selection Block Updates
Axel BEAUGENDRE Satoshi GOTO Takeshi YOSHIMURA 
Publication:   
Publication Date: 2017/02/01
Vol. E100-A  No. 2  pp. 581-591
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: IMAGE PROCESSING
Keyword: 
UHD4Kbackground modellingdetectionMBBM
 Summary | Full Text:PDF(4.4MB)

A Hardware-Trojans Identifying Method Based on Trojan Net Scoring at Gate-Level Netlists
Masaru OYA Youhua SHI Noritaka YAMASHITA Toshihiko OKAMURA Yukiyasu TSUNOO Satoshi GOTO Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12  pp. 2537-2546
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
hardware Trojansgolden-IC freeclassificationidentificationgate-level netlist
 Summary | Full Text:PDF(2.3MB)

High Performance VLSI Architecture of H.265/HEVC Intra Prediction for 8K UHDTV Video Decoder
Jianbin ZHOU Dajiang ZHOU Shihao WANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12  pp. 2519-2527
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
HEVC/H.265 decoderintra predictionVLSI architecture8K UHDTV
 Summary | Full Text:PDF(2.2MB)

Adaptive Block-Propagative Background Subtraction Method for UHDTV Foreground Detection
Axel BEAUGENDRE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/11/01
Vol. E98-A  No. 11  pp. 2307-2314
Type of Manuscript:  PAPER
Category: Image
Keyword: 
foreground detectionblock-propagationUHDTVABPBGS8K4Kmoving objectsuper hi-vision
 Summary | Full Text:PDF(2.3MB)

Human Detection Method Based on Non-Redundant Gradient Semantic Local Binary Patterns
Jiu XU Ning JIANG Wenxin YU Heming SUN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/08/01
Vol. E98-A  No. 8  pp. 1735-1742
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: 
Keyword: 
human detectionfeature extractionNon-Redundant Gradient Semantic Local Binary Patternssupport vector machine
 Summary | Full Text:PDF(4MB)

Low-Power Motion Estimation Processor with 3D Stacked Memory
Shuping ZHANG Jinjia ZHOU Dajiang ZHOU Shinji KIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7  pp. 1431-1441
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
3DIC designmotion estimation processorlow power designmemory stacking
 Summary | Full Text:PDF(4.1MB)

Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding
Shihao WANG Dajiang ZHOU Jianbin ZHOU Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7  pp. 1356-1365
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
UHDTVH.265/HEVCparameter decodermotion vectorboundary strength
 Summary | Full Text:PDF(3.6MB)

A Low-Cost VLSI Architecture of Multiple-Size IDCT for H.265/HEVC
Heming SUN Dajiang ZHOU Peilin LIU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2467-2476
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
HEVCIDCTSRAMarea-efficientvideo coding
 Summary | Full Text:PDF(3.1MB)

Fast SAO Estimation Algorithm and Its Implementation for 8K×4K @ 120 FPS HEVC Encoding
Jiayi ZHU Dajiang ZHOU Shinji KIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2488-2497
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
high efficiency video codingsample adaptive offsetRate Distortion Optimization (RDO) VLSI architecture
 Summary | Full Text:PDF(4.1MB)

Dynamic Check Message Majority-Logic Decoding Algorithm for Non-binary LDPC Codes
Yichao LU Xiao PENG Guifen TIAN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/06/01
Vol. E97-A  No. 6  pp. 1356-1364
Type of Manuscript:  Special Section PAPER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
non-binary LDPC codesmajority-logic decodingiterative decodingmessage-passing algorithms
 Summary | Full Text:PDF(1.4MB)

Real-Time Refinement Method for Foreground Objects Detectors Using Super Fast Resolution-Free Tracking System
Axel BEAUGENDRE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/02/01
Vol. E97-A  No. 2  pp. 520-529
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: 
Keyword: 
detectiontrackingUHDTVrefinement
 Summary | Full Text:PDF(3.7MB)

Fast Prediction Unit Selection and Mode Selection for HEVC Intra Prediction
Heming SUN Dajiang ZHOU Peilin LIU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/02/01
Vol. E97-A  No. 2  pp. 510-519
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: 
Keyword: 
intra predictionhigh efficiency video coding (HEVC)H.264/AVCvideo codingprediction unit size selectionmode selection
 Summary | Full Text:PDF(2.4MB)

A 5.83pJ/bit/iteration High-Parallel Performance-Aware LDPC Decoder IP Core Design for WiMAX in 65nm CMOS
Xiongxin ZHAO Zhixiang CHEN Xiao PENG Dajiang ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2623-2632
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
WiMAXbit-serialfully-parallellayered schedulingperformance awareadvanced dynamic quantizationquasi-cycliclow-density parity-check codes
 Summary | Full Text:PDF(2.2MB)

Hybrid Message-Passing Algorithm and Architecture for Decoding Cyclic Non-binary LDPC Codes
Yichao LU Gang HE Guifen TIAN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2652-2659
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
Belief propagation algorithmiterative majority-logic decodinglow-density parity-check codesnon-binaryVLSI
 Summary | Full Text:PDF(1.6MB)

A High Performance HEVC De-Blocking Filter and SAO Architecture for UHDTV Decoder
Jiayi ZHU Dajiang ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12  pp. 2612-2622
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
DBFSAOHEVCpipeline
 Summary | Full Text:PDF(4MB)

Floorplanning and Topology Synthesis for Application-Specific Network-on-Chips
Wei ZHONG Song CHEN Bo HUANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1174-1184
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
networks on chip (NoC)topology synthesisfloorplanning
 Summary | Full Text:PDF(2.4MB)

A Dual-Mode Deblocking Filter Design for HEVC and H.264/AVC
Muchen LI Jinjia ZHOU Dajiang ZHOU Xiao PENG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1366-1375
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
HEVCH.264/AVCdeblocking filterdual-modelow powerSHVHD
 Summary | Full Text:PDF(2.7MB)

An Integrated Hole-Filling Algorithm for View Synthesis
Wenxin YU Weichen WANG Minghui WANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1306-1314
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
DIBRvirtual viewhole-fillingin-painting
 Summary | Full Text:PDF(5.3MB)

Bidirectional Local Template Patterns: An Effective and Discriminative Feature for Pedestrian Detection
Jiu XU Ning JIANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1204-1213
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
pedestrian detectionfeature extractionbidirectional local template patternssupport vector machine
 Summary | Full Text:PDF(4.3MB)

Joint Feature Based Rain Detection and Removal from Videos
Xinwei XUE Xin JIN Chenyuan ZHANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A  No. 6  pp. 1195-1203
Type of Manuscript:  Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category: 
Keyword: 
rain detectionrain removalbilateral filteringDWT (discrete wavelet transform)
 Summary | Full Text:PDF(6MB)

Content Adaptive Hierarchical Decision of Variable Coding Block Sizes in High Efficiency Video Coding for High Resolution Videos
Guifen TIAN Xin JIN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/04/01
Vol. E96-A  No. 4  pp. 780-789
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
video codingHEVCcontent adaptivevariable block sized predictionsum of absolute quantized residual coefficient
 Summary | Full Text:PDF(2.9MB)

All-Zero Block-Based Optimization for Quadtree-Structured Prediction and Residual Encoding in High Efficiency Video Coding
Guifen TIAN Xin JIN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/04/01
Vol. E96-A  No. 4  pp. 769-779
Type of Manuscript:  PAPER
Category: Digital Signal Processing
Keyword: 
HEVCall-zero blockvariable block sizeresidual encoding
 Summary | Full Text:PDF(3.5MB)

Correlated Noise Reduction for Electromagnetic Analysis
Hongying LIU Xin JIN Yukiyasu TSUNOO Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/01/01
Vol. E96-A  No. 1  pp. 185-195
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Implementation
Keyword: 
electromagnetic analysis (EMA)power analysiselectromagnetic leakagecorrelated noisesingular value decomposition
 Summary | Full Text:PDF(2.9MB)

Novel Voltage Choice and Min-Cut Based Assignment for Dual-VDD System
Haiqi WANG Sheqin DONG Tao LIN Song CHEN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12  pp. 2208-2219
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
dual-vddmin-cutvoltage assignmentlow powertiming constraints
 Summary | Full Text:PDF(1.5MB)

A 115 mW 1 Gbps Bit-Serial Layered LDPC Decoder for WiMAX
Xiongxin ZHAO Xiao PENG Zhixiang CHEN Dajiang ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12  pp. 2384-2391
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
WiMAXbit-seriallayered schedulingQC-LDPC
 Summary | Full Text:PDF(3MB)

Framework of a Contour Based Depth Map Coding Method
Minghui WANG Xun HE Xin JIN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/08/01
Vol. E95-A  No. 8  pp. 1270-1279
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: Coding & Processing
Keyword: 
DIBRdepth mapMVCcontour coding
 Summary | Full Text:PDF(3MB)

Encoder-Unconstrained User Interactive Partial Decoding Scheme
Chen LIU Xin JIN Tianruo ZHANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/08/01
Vol. E95-A  No. 8  pp. 1288-1296
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: Coding & Processing
Keyword: 
partial decodingobject of interestH.264/AVC
 Summary | Full Text:PDF(7.8MB)

Pedestrian Detection Using Gradient Local Binary Patterns
Ning JIANG Jiu XU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/08/01
Vol. E95-A  No. 8  pp. 1280-1287
Type of Manuscript:  Special Section PAPER (Special Section on Image Media Quality)
Category: Coding & Processing
Keyword: 
pedestrian detectionfeature extractionlocal binary patternsupport vector machinegradient local binary pattern
 Summary | Full Text:PDF(3.2MB)

Cluster Generation and Network Component Insertion for Topology Synthesis of Application-Specific Network-on-Chips
Wei ZHONG Takeshi YOSHIMURA Bei YU Song CHEN Sheqin DONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 534-545
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
networks on chip (NoC)placementsynthesistopology
 Summary | Full Text:PDF(2MB)

Greedy Algorithm for the On-Chip Decoupling Capacitance Optimization to Satisfy the Voltage Drop Constraint
Mikiko SODE TANAKA Nozomu TOGAWA Masao YANAGISAWA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12  pp. 2482-2489
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword: 
power supply noisepower distribution networksignal integritycircuit simulation
 Summary | Full Text:PDF(710.1KB)

A 6.72-Gb/s 8 pJ/bit/iteration IEEE 802.15.3c LDPC Decoder Chip
Zhixiang CHEN Xiao PENG Xiongxin ZHAO Leona OKAMURA Dajiang ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12  pp. 2587-2596
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
WPANIEEE802.15.3cLDPC decoderhigh data ratepower-efficient
 Summary | Full Text:PDF(1.6MB)

A 98 GMACs/W 32-Core Vector Processor in 65 nm CMOS
Xun HE Xin JIN Minghui WANG Dajiang ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/12/01
Vol. E94-A  No. 12  pp. 2609-2618
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
SIMDcache coherenceNoCGMACsmulticore processor
 Summary | Full Text:PDF(3.6MB)

Watermarking for HDR Image Robust to Tone Mapping
Xinwei XUE Takao JINNO Xin JIN Masahiro OKUDA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/11/01
Vol. E94-A  No. 11  pp. 2334-2341
Type of Manuscript:  Special Section PAPER (Special Section on Smart Multimedia & Communication Systems)
Category: Image Processing
Keyword: 
HDR imagewatermarkingtone mappingµ-Lawbilateral filtering
 Summary | Full Text:PDF(5.4MB)

Multiple Region-of-Interest Based H.264 Encoder with a Detection Architecture in Macroblock Level Pipelining
Tianruo ZHANG Chen LIU Minghui WANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 401-410
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264 encodingVLSI architectureregion-of-interestlow power
 Summary | Full Text:PDF(3.3MB)

Cache Based Motion Compensation Architecture for Quad-HD H.264/AVC Video Decoder
Jinjia ZHOU Dajiang ZHOU Gang HE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 439-447
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264/AVCmotion compensation2-D cacheinterpolationQuad-HDultra high definition
 Summary | Full Text:PDF(1.1MB)

A 530 Mpixels/s Intra Prediction Architecture for Ultra High Definition H.264/AVC Encoder
Gang HE Dajiang ZHOU Jinjia ZHOU Tianruo ZHANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 419-427
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
H.264/AVCintra predictiondata dependencyhardware architecture
 Summary | Full Text:PDF(2.1MB)

Optimized 2-D SAD Tree Architecture of Integer Motion Estimation for H.264/AVC
Yibo FAN Xiaoyang ZENG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 411-418
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
IMEVBSME2-D SAD treeH.264
 Summary | Full Text:PDF(1.6MB)

Greedy Optimization Algorithm for the Power/Ground Network Design to Satisfy the Voltage Drop Constraint
Mikiko SODE TANAKA Nozomu TOGAWA Masao YANAGISAWA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/04/01
Vol. E94-A  No. 4  pp. 1082-1090
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
power supply noisepower distribution networkssignal integritycircuit simulation
 Summary | Full Text:PDF(641.4KB)

Generic Permutation Network for QC-LDPC Decoder
Xiao PENG Xiongxin ZHAO Zhixiang CHEN Fumiaki MAEHARA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2551-2559
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
LDPC decoderreconfigurablepermutation networkparallelism
 Summary | Full Text:PDF(1.2MB)

Accurate Human Detection by Appearance and Motion
Shaopeng TANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/10/01
Vol. E93-D  No. 10  pp. 2728-2736
Type of Manuscript:  Special Section PAPER (Special Section on Data Mining and Statistical Science)
Category: 
Keyword: 
human detectionmulti scale block histogram of templateGraphics process unit
 Summary | Full Text:PDF(560.8KB)

A Bandwidth Optimized, 64 Cycles/MB Joint Parameter Decoder Architecture for Ultra High Definition H.264/AVC Applications
Jinjia ZHOU Dajiang ZHOU Xun HE Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/08/01
Vol. E93-A  No. 8  pp. 1425-1433
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: VLSI Design Technology and CAD
Keyword: 
motion vector derivationDRAM bandwidthultra high resolutionvideo decoderH.264/AVC
 Summary | Full Text:PDF(914.3KB)

Histogram of Template for Pedestrian Detection
Shaopeng TANG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/07/01
Vol. E93-D  No. 7  pp. 1737-1744
Type of Manuscript:  Special Section PAPER (Special Section on Machine Vision and its Applications)
Category: 
Keyword: 
human detectionhistogram of templateSVM
 Summary | Full Text:PDF(894.1KB)

Permutation Network for Reconfigurable LDPC Decoder Based on Banyan Network
Xiao PENG Zhixiang CHEN Xiongxin ZHAO Fumiaki MAEHARA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 270-278
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
permutationbanyan networkLDPC decoderreconfigurable
 Summary | Full Text:PDF(710.8KB)

A High Performance and Low Bandwidth Multi-Standard Motion Compensation Design for HD Video Decoder
Xianmin CHEN Peilin LIU Dajiang ZHOU Jiayi ZHU Xingguang PAN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 253-260
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
high performancelow bandwidthmotion compensationmulti-standard2-D cache
 Summary | Full Text:PDF(785.5KB)

A 48 Cycles/MB H.264/AVC Deblocking Filter Architecture for Ultra High Definition Applications
Dajiang ZHOU Jinjia ZHOU Jiayi ZHU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 3203-3210
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
H.264/AVCparalleldeblockingultra high resolutionQFHD
 Summary | Full Text:PDF(2.1MB)

Voltage and Level-Shifter Assignment Driven Floorplanning
Bei YU Sheqin DONG Song CHEN Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12  pp. 2990-2997
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Desing
Keyword: 
voltage-islandvoltage assignmentconvex network flowlevel shifter assignmentwhite space redistribution
 Summary | Full Text:PDF(513.2KB)

Adaptive Sub-Sampling Based Reconfigurable SAD Tree Architecture for HDTV Application
Yiqing HUANG Qin LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/11/01
Vol. E92-A  No. 11  pp. 2819-2829
Type of Manuscript:  Special Section PAPER (Special Section on Smart Multimedia & Communication Systems)
Category: Video Coding
Keyword: 
reconfigurable architectureH.264/AVCSAD treeVLSIHDTV
 Summary | Full Text:PDF(1.3MB)

Pipeline-Based Partition Exploration for Heterogeneous Multiprocessor Synthesis
Kang ZHAO Jinian BIAN Sheqin DONG Yang SONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/09/01
Vol. E92-A  No. 9  pp. 2283-2294
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
application partitioningCAD algorithmMPSoCASIPsynthesis
 Summary | Full Text:PDF(1.6MB)

An Efficient Motion Vector Coding Scheme Based on Prioritized Reference Decision
Dajiang ZHOU Jinjia ZHOU Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/08/01
Vol. E92-A  No. 8  pp. 1978-1985
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: Realization
Keyword: 
video codingmotion vector codingmotion vector differencemedian predictionprioritized reference decision
 Summary | Full Text:PDF(309.8KB)

VLSI Oriented Fast Motion Estimation Algorithm Based on Pixel Difference, Block Overlapping and Motion Feature Analysis
Yiqing HUANG Qin LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/08/01
Vol. E92-A  No. 8  pp. 1986-1999
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: Realization
Keyword: 
H.264/AVCMEpixel differenceblock overlappingmotion feature
 Summary | Full Text:PDF(1.3MB)

Hardware-Oriented Early Detection Algorithms for 44 and 88 All-Zero Blocks in H.264
Qin LIU Yiqing HUANG Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4  pp. 1063-1071
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
all-zero blockearly detectionsum of absolute differencehardware-orientedH.264
 Summary | Full Text:PDF(576.7KB)

An Ultra-Low Bandwidth Design Method for MPEG-2 to H.264/AVC Transcoding
Xianghui WEI Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4  pp. 1072-1079
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
H.264MPEG-2transcodingmotion estimationsearch window reuse
 Summary | Full Text:PDF(727.8KB)

High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H.264/AVC Intra Encoding
Tianruo ZHANG Guifen TIAN Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12  pp. 3630-3637
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
H.264/AVCintra predictionfast mode decision algorithmVLSI architecture
 Summary | Full Text:PDF(870.9KB)

A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule
Wen JI Yuta ABE Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12  pp. 3622-3629
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
LDPCmessage passing algorithm
 Summary | Full Text:PDF(565.6KB)

Variable Block Size Motion Vector Retrieval Schemes for H.264 Inter Frame Error Concealment
Lei WANG Jun WANG Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/10/01
Vol. E91-A  No. 10  pp. 2945-2953
Type of Manuscript:  Special Section PAPER (Special Section on Smart Multimedia & Communication Systems)
Category: Video Coding
Keyword: 
H.264/AVCvariable block size error concealmentmotion vector refinementdirectional spatio-temporal boundary matching algorithm
 Summary | Full Text:PDF(587.6KB)

Standard Deviation and Intra Prediction Mode Based Adaptive Spatial Error Concealment (SEC) in H.264/AVC
Jun WANG Lei WANG Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/10/01
Vol. E91-A  No. 10  pp. 2954-2962
Type of Manuscript:  Special Section PAPER (Special Section on Smart Multimedia & Communication Systems)
Category: Video Coding
Keyword: 
SECadaptivestandard deviationintra prediction mode
 Summary | Full Text:PDF(1.1MB)

Exploring Partitions Based on Search Space Smoothing for Heterogeneous Multiprocessor System
Kang ZHAO Jinian BIAN Sheqin DONG Yang SONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/09/01
Vol. E91-A  No. 9  pp. 2456-2464
Type of Manuscript:  Special Section PAPER (Special Section on Nonlinear Theory and its Applications)
Category: Electronic Circuits and Systems
Keyword: 
hardware/software partitioningCAD algorithmsearch space smoothingMPSoCASIP
 Summary | Full Text:PDF(821.9KB)

Edge Block Detection and Motion Vector Information Based Fast VBSME Algorithm
Qin LIU Yiqing HUANG Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/08/01
Vol. E91-A  No. 8  pp. 1935-1943
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: 
Keyword: 
motion estimationaliasingsubsamplingmultiple reference framesearch range
 Summary | Full Text:PDF(876.4KB)

Content-Aware Fast Motion Estimation for H.264/AVC
Zhenyu LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/08/01
Vol. E91-A  No. 8  pp. 1944-1952
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing)
Category: 
Keyword: 
H.264/AVCmotion estimationearly terminationmultiple reference framevariable block size
 Summary | Full Text:PDF(1.3MB)

Fast Custom Instruction Identification Algorithm Based on Basic Convex Pattern Model for Supporting ASIP Automated Design
Kang ZHAO Jinian BIAN Sheqin DONG Yang SONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/06/01
Vol. E91-A  No. 6  pp. 1478-1487
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
custom instruction identificationbasic convex pattern (BCP)system-on-a-chip (SoC)application specific instruction-set processor (ASIP)
 Summary | Full Text:PDF(530.9KB)

A 41 mW VGA@30 fps Quadtree Video Encoder for Video Surveillance Systems
Qin LIU Seiichiro HIRATSUKA Kazunori SHIMIZU Shinsuke USHIKI Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 449-456
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
video surveillance systemmotion estimationME-MC processorquadtreelow power consumption
 Summary | Full Text:PDF(1MB)

Reconfigurable Variable Block Size Motion Estimation Architecture for Search Range Reduction Algorithm
Yibo FAN Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 440-448
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
reconfigurableVBSMEsearch range reductionH.264
 Summary | Full Text:PDF(1.9MB)

Low Power LDPC Code Decoder Architecture Based on Intermediate Message Compression Technique
Kazunori SHIMIZU Nozomu TOGAWA Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 1054-1061
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
low-density parity-check codemessage-passing algorithmintermediate message compression techniqueclock gated shift register for intermediate message
 Summary | Full Text:PDF(451.3KB)

Parallel Improved HDTV720p Targeted Propagate Partial SAD Architecture for Variable Block Size Motion Estimation in H.264/AVC
Yiqing HUANG Zhenyu LIU Yang SONG Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 987-997
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
H.264/AVCvariable block size motion estimationhardware architecture
 Summary | Full Text:PDF(846.7KB)

A High-Speed Design of Montgomery Multiplier
Yibo FAN Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 971-977
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
Montgomery multiplierhigh-speedhigh-radixscalable
 Summary | Full Text:PDF(1.3MB)

Adaptive Search Range Algorithms for Variable Block Size Motion Estimation in H.264/AVC
Zhenxing CHEN Yang SONG Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/04/01
Vol. E91-A  No. 4  pp. 1015-1022
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 20th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
H.264/AVCVBSMEASRMVD
 Summary | Full Text:PDF(1.3MB)

An Irregular Search Window Reuse Scheme for MPEG-2 to H.264 Transcoding
Xiang-Hui WEI Shen LI Yang SONG Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/03/01
Vol. E91-A  No. 3  pp. 749-755
Type of Manuscript:  Special Section PAPER (Special Section on Signal Processing for Audio and Visual Systems and Its Implementations)
Category: Image Coding and Video Coding
Keyword: 
MPEG-2 to H.264 transcodingmotion estimationsearch window reuse
 Summary | Full Text:PDF(497.2KB)

An Unequal Secure Encryption Scheme for H.264/AVC Video Compression Standard
Yibo FAN Jidong WANG Takeshi IKENAGA Yukiyasu TSUNOO Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1  pp. 12-21
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Symmetric Cryptography
Keyword: 
Unequal Secure Encryptionvideo encryptionselective encryptionH.264/AVCAESLEX
 Summary | Full Text:PDF(2.2MB)

Efficient Fully-Parallel LDPC Decoder Design with Improved Simplified Min-Sum Algorithms
Qi WANG Kazunori SHIMIZU Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/10/01
Vol. E90-C  No. 10  pp. 1964-1971
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Technology toward Frontiers of New Market)
Category: VLSI Architecture for Communication/Server Systems
Keyword: 
area and power efficient fully-parallel LDPC decoderimproved simplified min-sum algorithmspower-saved strategy
 Summary | Full Text:PDF(514.3KB)

Periodic Spectrum Transmission for Single-Carrier Transmission Frequency-Domain Equalization
Fumiaki MAEHARA Satoshi GOTO Fumio TAKAHATA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2007/06/01
Vol. E90-B  No. 6  pp. 1407-1414
Type of Manuscript:  PAPER
Category: Wireless Communication Technologies
Keyword: 
single-carrier (SC) transmissionfrequency-domain equalization (FDE)even-numbered samplesfrequency diversityhigh-level modulation
 Summary | Full Text:PDF(722.2KB)

Fast Methods to Estimate Clock Jitter due to Power Supply Noise
Koutaro HACHIYA Takayuki OHSHIMA Hidenari NAKASHIMA Masaaki SODA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4  pp. 741-747
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
clock jitterpower supply noiseclock distribution networkpower distribution network
 Summary | Full Text:PDF(499.9KB)

Lossy Strict Multilevel Successive Elimination Algorithm for Fast Motion Estimation
Yang SONG Zhenyu LIU Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4  pp. 764-770
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
motion estimation (ME)successive elimination algorithm (SEA)multilevel successive elimination algorithm (MSEA)strict multilevel successive elimination algorithm (SMSEA)
 Summary | Full Text:PDF(500.5KB)

Lossless VLSI Oriented Full Computation Reusing Algorithm for H.264/AVC Fractional Motion Estimation
Ming SHAO Zhenyu LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4  pp. 756-763
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
H.264/AVCFMEcomputation reusinglosslessVLSI
 Summary | Full Text:PDF(780.5KB)

Low-Power Partial Distortion Sorting Fast Motion Estimation Algorithms and VLSI Implementations
Yang SONG Zhenyu LIU Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/01/01
Vol. E90-D  No. 1  pp. 108-117
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Image Technology)
Category: 
Keyword: 
motion estimation (ME)partial distortion sorting (PDS)systolic array architecture
 Summary | Full Text:PDF(804.6KB)

Geometrical, Physical and Text/Symbol Analysis Based Approach of Traffic Sign Detection System
Yangxing LIU Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/01/01
Vol. E90-D  No. 1  pp. 208-216
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Image Technology)
Category: 
Keyword: 
traffic sign detectiongeometrical analysisphysical analysistext detection
 Summary | Full Text:PDF(1.1MB)

Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding
Shen LI Lingfeng LI Takeshi IKENAGA Shunichi ISHIWATA Masataka MATSUI Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/01/01
Vol. E90-D  No. 1  pp. 90-98
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Image Technology)
Category: 
Keyword: 
MPEG-2/H.264 video transcodingcontent-basedmode decisionintra prediction
 Summary | Full Text:PDF(669.7KB)

Power-Efficient LDPC Decoder Architecture Based on Accelerated Message-Passing Schedule
Kazunori SHIMIZU Tatsuyuki ISHIKAWA Nozomu TOGAWA Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3602-3612
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
low-density parity-check codesparallel LDPC decoder architecturemessage-passing algorithmFIFO-based buffering
 Summary | Full Text:PDF(1017.1KB)

A Fine-Grain Scalable and Low Memory Cost Variable Block Size Motion Estimation Architecture for H.264/AVC
Zhenyu LIU Yang SONG Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/12/01
Vol. E89-C  No. 12  pp. 1928-1936
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
H.264AVCvariable block size motion estimationVLSI architecture
 Summary | Full Text:PDF(666.9KB)

A VLSI Architecture for Variable Block Size Motion Estimation in H.264/AVC with Low Cost Memory Organization
Yang SONG Zhenyu LIU Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3594-3601
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
variable block size motion estimation (VBSME)memory organizationH.264/AVC
 Summary | Full Text:PDF(502.7KB)

Partially-Parallel LDPC Decoder Achieving High-Efficiency Message-Passing Schedule
Kazunori SHIMIZU Tatsuyuki ISHIKAWA Nozomu TOGAWA Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4  pp. 969-978
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
low-density parity-check codespartially-parallel LDPC decodermessage-passing algorithmFPGA
 Summary | Full Text:PDF(748.2KB)

Scalable VLSI Architecture for Variable Block Size Integer Motion Estimation in H.264/AVC
Yang SONG Zhenyu LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4  pp. 979-988
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
variable block size motion estimation (VBSME)H.264/AVCvery large scale integration (VLSI) architecture
 Summary | Full Text:PDF(1.4MB)

A Hardware Implementation of a Content-Based Motion Estimation Algorithm for Real-Time MPEG-4 Video Coding
Shen LI Takeshi IKENAGA Hideki TAKEDA Masataka MATSUI Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4  pp. 932-940
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
content-basedmotion estimationpower-efficientreal-timeMPEG-4
 Summary | Full Text:PDF(1.2MB)

A Contour-Based Robust Algorithm for Text Detection in Color Images
Yangxing LIU Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2006/03/01
Vol. E89-D  No. 3  pp. 1221-1230
Type of Manuscript:  PAPER
Category: Image Recognition, Computer Vision
Keyword: 
text detectiontexture analysisconnected component analysisregion contouredge detection
 Summary | Full Text:PDF(1.2MB)

A Selective Video Encryption Scheme for MPEG Compression Standard
Gang LIU Takeshi IKENAGA Satoshi GOTO Takaaki BABA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/01/01
Vol. E89-A  No. 1  pp. 194-202
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Application
Keyword: 
commercial multimedia applicationsselective encryptionMPEG codecMPEG bitstreamdata shuffleprocessing overheadbit overhead
 Summary | Full Text:PDF(524KB)

A VLSI Array Processing Oriented Fast Fourier Transform Algorithm and Hardware Implementation
Zhenyu LIU Yang SONG Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3523-3530
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
fast Fourier transform (FFT)array processingsingleton algorithm
 Summary | Full Text:PDF(1.5MB)

Content-Based Motion Estimation with Extended Temporal-Spatial Analysis
Shen LI Yong JIANG Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1561-1568
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Image Processing and Multimedia Systems
Keyword: 
motion estimationadaptivecontent-basedspatial and temporal correlation
 Summary | Full Text:PDF(990.5KB)

A Highly Parallel Architecture for Deblocking Filter in H.264/AVC
Lingfeng LI Satoshi GOTO Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1623-1629
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Parallel and/or Distributed Processing Systems
Keyword: 
deblocking filterH.264/AVCparallel memoryadaptive filter
 Summary | Full Text:PDF(935.7KB)

Reconfigurable Adaptive FEC System Based on Reed-Solomon Code with Interleaving
Kazunori SHIMIZU Nozomu TOGAWA Takeshi IKENAGA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1526-1537
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Adaptive Signal Processing
Keyword: 
dynamic reconfigurable systemadaptive FECReed-Solomon code with interleaving
 Summary | Full Text:PDF(705.6KB)