IEICE SEARCH SYSTEM

Qi-Wei GE

Incorporation of Cycles and Inhibitory Arcs into the Timed Petri Net Model of Signaling Pathway Yuki MURAKAMI Qi-Wei GE Hiroshi MATSUNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2013/02/01 Vol. E96-A No. 2 pp. 514-524 Type of Manuscript: Special Section PAPER (Special Section on Mathematical Systems Science and its Applications) Category: Concurrent Systems Keyword: signaling pathway, timed Petri net, retention-free Petri net, self-loop, cycle, inhibitory arc,
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Parallel Degree of Well-Structured Workflow Nets Nan QU Shingo YAMAGUCHI Qi-Wei GE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 pp. 2730-2739 Type of Manuscript: Special Section PAPER (Special Section on Theory of Concurrent Systems and its Applications) Category: Keyword: WF-nets, well-structured, PARAdeg, heuristic algorithm, longest path, nest structure,
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Delay Time Determination for the Timed Petri Net Model of a Signaling Pathway Based on Its Structural Information Yoshimasa MIWA Yuki MURAKAMI Qi-Wei GE Chen LI Hiroshi MATSUNO Satoru MIYANO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-A No. 12 pp. 2717-2729 Type of Manuscript: Special Section PAPER (Special Section on Theory of Concurrent Systems and its Applications) Category: Keyword: Petri net, signaling pathway, firing delay time, stochastic decision rule, conflict resolution,
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WF-Net Based Modeling and Soundness Verification of Interworkflows Shingo YAMAGUCHI Hajime MATSUO Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/04/01 Vol. E90-A No. 4 pp. 829-835 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: interworkflow, interoperability, workflow net, Petri net, soundness,
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Complexity and a Heuristic Algorithm of Computing Parallel Degree for Program Nets with SWITCH-Nodes Shingo YAMAGUCHI Tomohiro TAKAI Tatsuya WATANABE Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/11/01 Vol. E89-A No. 11 pp. 3207-3215 Type of Manuscript: Special Section PAPER (Special Section on Concurrent/Hybrid Systems: Theory and Applications) Category: Concurrent Systems Keyword: program nets, parallel degree, computation complexity, NP-completeness,
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Performance Evaluation on Worst Change Time of Flush and SCO Dynamic Changes for State Machine WF-Nets Shingo YAMAGUCHI Katsuaki MIYAUCHI Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/06/01 Vol. E89-A No. 6 pp. 1701-1704 Type of Manuscript: Special Section LETTER (Special Section on Papers Selected from 2005 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2005)) Category: Keyword: workflow, dynamic change, state machine,
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Dead Problem of Program Nets Shingo YAMAGUCHI Kousuke YAMADA Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/04/01 Vol. E89-A No. 4 pp. 887-894 Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: program nets, dead, dead problem, computation complexity, NP-completeness,
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Performance Evaluation of a Two-Processor Scheduling Method for Acyclic SWITCH-less Program Nets Qi-Wei GE Chen LI Mitsuru NAKATA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/06/01 Vol. E88-A No. 6 pp. 1502-1506 Type of Manuscript: Special Section LETTER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004)) Category: Keyword: multiprocessor scheduling, program net, dynamic priority list, optimal schedule, GA scheduling,
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A Flexible and Efficient Workflow Change Type: Selective Shift Shingo YAMAGUCHI Akira MISHIMA Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/06/01 Vol. E88-A No. 6 pp. 1487-1496 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2004 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2004)) Category: Keyword: workflows, dynamic change, workflow nets, Petri nets, change time,
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Computation Methods of Maximum Throughput for MG/ SMWF-Nets with Conflict-Free Resources Shingo YAMAGUCHI Keisuke KUNIYOSHI Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/11/01 Vol. E87-A No. 11 pp. 2868-2877 Type of Manuscript: Special Section PAPER (Special Section on Concurrent Systems and Hybrid Systems) Category: Concurrent Systems Keyword: workflow, resource, throughput, workflow nets, Petri nets,
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A New Proposal to Two-Processor Scheduling Problem for SWITCH-less Program Nets Qi-Wei GE Chen LI Mitsuru NAKATA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/11/01 Vol. E87-A No. 11 pp. 2859-2867 Type of Manuscript: Special Section PAPER (Special Section on Concurrent Systems and Hybrid Systems) Category: Concurrent Systems Keyword: program net, multiprocessor scheduling, dynamic priority list, optimal schedule, GA scheduling,
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Modeling and Performance Evaluation on Change Time for Migrate Dynamic Workflow Changes Shingo YAMAGUCHI Akira MISHIMA Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/06/01 Vol. E86-A No. 6 pp. 1466-1475 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2002 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2002)) Category: Keyword: workflow, Migrate dynamic change, modeling, performance evaluation, change time, Petri nets,
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FOREWORD Qi-Wei GE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/11/01 Vol. E85-A No. 11 pp. 2385-2385 Type of Manuscript: FOREWORD Category: Keyword:
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An Optimal Two-Processor Scheduling for a Class of SWITCH-less Program Nets with Combined OR-nodes Qi-Wei GE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/06/01 Vol. E85-A No. 6 pp. 1274-1280 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2001 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2001)) Category: Keyword: program net, two-processor scheduling, hybrid priority list, combined OR-node, optimality,
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Performance Evaluation on Transient Time of Dynamic Workflow Changes Shingo YAMAGUCHI Yuko SHIODE Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 pp. 2852-2864 Type of Manuscript: Special Section PAPER (Special Section on Concurrent Systems Technology) Category: Keyword: workflow, dynamic change, transient time, performance evaluation, Petri net,
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A Computation Method of LSN for Extended 2-b-SPGs Qi-Wei GE Yasunori SUGIMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 pp. 2838-2851 Type of Manuscript: Special Section PAPER (Special Section on Concurrent Systems Technology) Category: Keyword: topological sorting, directed acyclic graph, series-parallel graph, legal sequence, legal sequence number,
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A Petri Net Based Public-Key Cryptography: PNPKC Qi-Wei GE Takako OKAMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/06/01 Vol. E84-A No. 6 pp. 1532-1535 Type of Manuscript: Special Section LETTER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000)) Category: Keyword: public-key cryptography, RSA, PGP, Petri net, T-invariant,
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An Effective Dynamic Priority List for 2-Processor Scheduling of Program Nets Qi-Wei GE Akira TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/03/01 Vol. E84-A No. 3 pp. 755-762 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: program net, 2-processor scheduling, hybrid priority list, dynamic priority list, genetic algorithm,
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Performance Evaluation on Change Time of Dynamic Workflow Changes Shingo YAMAGUCHI Qi-Wei GE Minoru TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/11/20 Vol. E83-A No. 11 pp. 2177-2187 Type of Manuscript: Special Section PAPER (Special Section on Concurrent Systems Technology) Category: Keyword: workflow, dynamic change, performance evaluation, Petri net, workflow net,
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Evaluation of PARAdeg of Acyclic SWITCH-Less Program Nets Qi-Wei GE Kenji ONAGA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/06/20 Vol. E83-A No. 6 pp. 1186-1191 Type of Manuscript: Special Section LETTER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99)) Category: Keyword: program net, parallel degree, multiprocessor scheduling, GA scheduling, evaluation,
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Two-Processor Scheduling of General Acyclic SWITCH-less Program Nets via Hybrid Priority Lists Qi-Wei GE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/03/20 Vol. E83-A No. 3 pp. 471-479 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 12th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: data-flow program, program net, two-processor scheduling, hybrid priority list, genetic algorithm, performance evaluation,
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A Two-Processor Scheduling Method for a Class of Program Nets with Unity Node Firing Time Qi-Wei GE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/11/20 Vol. E82-A No. 11 pp. 2579-2583 Type of Manuscript: Special Section LETTER (Special Section on Concurrent Systems Technology) Category: Keyword: program net, two-processor scheduling, hybrid priority list, genetic algorithm, performance evaluation,
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Computation of Minimum Firing Time for General Self-Cleaning SWITCH-Less Program Nets Qi-Wei GE Hidenori YANAGIDA Kenji ONAGA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/06/20 Vol. E81-A No. 6 pp. 1072-1078 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from ITC-CSCC'97) Category: Graphs and Networks Keyword: data-flow program, program net, minimum firing time, node contraction,
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A Method of Finding Legal Sequence Number for a Class of Extended Series-Parallel Digraphs Qi-Wei GE Naomi YOSHIOKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/04/20 Vol. E80-A No. 4 pp. 635-642 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: topological sorting, legal sequence, legal sequence number, digraph, st-DAG, series-parallel graph,
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On Verification of Token Self-Cleanness of Data-Flow Program Nets Qi-Wei GE Kenji ONAGA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/06/20 Vol. E79-A No. 6 pp. 812-817 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1995 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC '95)) Category: Keyword: data-flow program, program net, token selfcleanness, verification,
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Analysis of Parallelism in Autonomous Execution of Data-Flow Program Nets Qi-Wei GE Toshimasa WATANABE Kenji ONAGA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1991/10/20 Vol. E74-A No. 10 pp. 3008-3017 Type of Manuscript: Special Section PAPER (Special Issue on JTC-CSCC '90) Category: Graphs and Networks Keyword:
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Topological Analysis of Firing Activities of Data-Flow Program Nets Qi-Wei GE Toshimasa WATANABE Kenji ONAGA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/07/20 Vol. E73-E No. 7 pp. 1215-1224 Type of Manuscript: PAPER Category: Software Theory Keyword:
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