IEICE SEARCH SYSTEM

Okihiko ISHIZUKA

Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits Motoi INABA Koichi TANNO Hiroki TAMURA Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-D No. 8 pp. 2073-2079 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Multiple-Valued VLSI Technology Keyword: multiple-valued logic, overlap resolution number system, current-mode circuit, weak-inversion region,
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Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit Koichi TANNO Kiminobu SATO Hisashi TANAKA Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/10/01 Vol. E88-A No. 10 pp. 2696-2698 Type of Manuscript: Special Section LETTER (Special Section on Nonlinear Theory and its Applications) Category: Keyword: sample hold circuit, low-voltage circuits, boost circuits, MOS analog integrated circuits, analog circuits,
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Combiner-Based MOS OTAs Koichi TANNO Kenya KONDO Okihiko ISHIZUKA Takako TOYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2005/06/01 Vol. E88-A No. 6 pp. 1622-1625 Type of Manuscript: LETTER Category: Analog Signal Processing Keyword: OTA, operational transconductance amplifier, combiner, CMOS analog integrated circuits,
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Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-A No. 12 pp. 3294-3296 Type of Manuscript: LETTER Category: Analog Signal Processing Keyword: analog integrated circuits, floating-gate MOSFET (FG-MOSFET), variable resistor circuit, wide-input range,
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Wide Input-Range Four-Quadrant Analog Multiplier Using Floating-Gate MOSFET's Dasong ZHU Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/07/01 Vol. E86-A No. 7 pp. 1759-1765 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: analog multiplier, wide input-range, FG-MOSFET,
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Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/02/01 Vol. E86-A No. 2 pp. 342-349 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog integrated circuits, floating-gate MOSFET (FG-MOSFET), voltage-controlled linear variable resistor (VCLVR), low-power and wide-input range,
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A High-Speed Binary to Residue Converter Using a Signed-Digit Number Representation Makoto SYUTO Eriko SATAKE Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2002/05/01 Vol. E85-D No. 5 pp. 903-905 Type of Manuscript: LETTER Category: VLSI Systems Keyword: residue number system, signed-digit number representation, binary to residue converter, carry-free addition,
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Analog Inverter with Neuron-MOS Transistors and Its Application Motoi INABA Koichi TANNO Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/02/01 Vol. E85-A No. 2 pp. 360-365 Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analog inverter, down literal circuit, NOT function, MAX function, MIN function,
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A Multiple-Valued Immune Network and Its Applications Zheng TANG Takayuki YAMAGUCHI Koichi TASHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/06/20 Vol. E82-A No. 6 pp. 1102-1108 Type of Manuscript: PAPER Category: Neural Networks Keyword: multiple-valued, immune network, immune response, pattern recognition,
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Neuron-MOS Current Mirror Circuit and Its Application to Multi-Valued Logic Jing SHEN Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1999/05/20 Vol. E82-D No. 5 pp. 940-948 Type of Manuscript: Special Section PAPER (Special Issue on Multiple-Valued Logic and Its Applications) Category: Circuits Keyword: neuron MOS transistor, multi-valued logic, current-mode circuit, current mirror, current comparator, threshold detector, T-gate, integrated circuit,
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A 1-V, 1-V_p-p Input Range, Four-Quadrant Analog Multiplier Using Neuron-MOS Transistors Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1999/05/20 Vol. E82-C No. 5 pp. 750-757 Type of Manuscript: PAPER Category: Electronic Circuits Keyword: multiplier, low voltage, low power, neuron MOS transistor, analog integrated circuit,
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Ultra-Low Power Two-MOS Virtual-Short Circuit and Its Application Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/10/20 Vol. E81-A No. 10 pp. 2194-2200 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: virtual-short, weak-inversion region, low power, low voltage, CMOS analog circuit, integrated circuit,
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Neuron-MOSV_T Cancellation Circuit and Its Application to a Low-Power and High-Swing Cascode Current Mirror Koichi TANNO Jing SHEN Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/01/20 Vol. E81-A No. 1 pp. 110-116 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: neuron-MOS transistor, threshold voltage, CMOS analog circuit, circuit theory and design, integrated circuit,
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1: n² MOS Cascode Circuits and Their Applications Koichi TANNO Okihiko ISHIZUKA Zheng TANG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/12/20 Vol. E79-A No. 12 pp. 2159-2165 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: MOS analog circuit, MOS LSI, circuit theory and design, integrated circuit, threshold voltage,
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Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter Zheng TANG Yuichi SHIRATA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/04/20 Vol. E79-A No. 4 pp. 553-559 Type of Manuscript: PAPER Category: Analog Signal Processing Keyword: neural networks, Hopfield model, calibrating, A/D converter,
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Hopfield Neural Network Learning Using Direct Gradient Descent of Energy Function Zheng TANG Koichi TASHIMA Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/02/20 Vol. E79-A No. 2 pp. 258-261 Type of Manuscript: LETTER Category: Neural Networks Keyword: neural networks, gradient descent learning, Hopfield model, analog-to-digital conversion, associative memory,
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Implementation of T-Model Neural-Based PCM Encoders Using MOS Charge-Mode Circuits Zheng TANG Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/10/20 Vol. E78-A No. 10 pp. 1345-1349 Type of Manuscript: Special Section LETTER (Special Section on Nonlinear Theory and Its Applications) Category: Keyword: neural network, T-Model, PCM encoder network, Hopfield model, MOS charge-mode circuits,
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Design of a Novel MOS V_T Extractor Circuit Koichi TANNO Okihiko ISHIZUKA Zhen TANG
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1995/09/20 Vol. E78-C No. 9 pp. 1306-1310 Type of Manuscript: LETTER Category: Electronic Circuits Keyword: MOS analog circuit, threshold voltage, MOS LSI, circuit theory and design, integrated circuit,
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A Learning Fuzzy Network and Its Applications to Inverted Pendulum System Zheng TANG Yasuyoshi KOBAYASHI Okihiko ISHIZUKA Koichi TANNO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/06/20 Vol. E78-A No. 6 pp. 701-707 Type of Manuscript: PAPER Category: Systems and Control Keyword: fuzzy network, learning, fuzzy controller, back propagation,
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Design and Implementations of a Learning T-Model Neural Network Zheng TANG Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/02/20 Vol. E78-A No. 2 pp. 259-263 Type of Manuscript: LETTER Category: Neural Networks Keyword: neural networks, Hopfield model, T-Model, learning, backpropagation, implementations, hardware,
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Investigation and Analysis of Hysteresis in Hopfield and T–Model Neural Networks Zheng TANG Okihiko ISHIZUKA Masakazu SAKAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/11/20 Vol. E77-A No. 11 pp. 1970-1976 Type of Manuscript: PAPER Category: Neural Networks Keyword: neural networks, Hopfield model, T–Model, hysteresis, local minima, optimization,
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T-Model Neural Network for PCM Encoding Zheng TANG Okihiko ISHIZUKA Masakazu SAKAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/10/20 Vol. E77-A No. 10 pp. 1718-1721 Type of Manuscript: LETTER Category: Neural Networks Keyword: neural network, T-Model, PCM encoder network, Hopfield model, non-linear A/D converter, A-law,
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A Model of Neurons with Unidirectional Linear Response Zheng TANG Okihiko ISHIZUKA Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1993/09/20 Vol. E76-A No. 9 pp. 1537-1540 Type of Manuscript: LETTER Category: Neural Networks Keyword: neural model, unidirectional linear response, analog and continuous signal processing, algorithm, multi-layer network,
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Multiple-Valued Neuro-Algebra Zheng TANG Okihiko ISHIZUKA Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1993/09/20 Vol. E76-A No. 9 pp. 1541-1543 Type of Manuscript: LETTER Category: Neural Networks Keyword: multiple-valued algebra, functional completeness, canonical form, supervised learning,
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Multiple-Valued Static Random-Access-Memory Design and Application Zheng TANG Okihiko ISHIZUKA Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1993/03/20 Vol. E76-C No. 3 pp. 403-411 Type of Manuscript: Special Section PAPER (Special Issue on Multiple-Valued Integrated Circuits) Category: Keyword: multiple-valued logic, static random-access-memory, MOS devices, integrated circuits, flip-flops, multi-stable,
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An Adaptive Fuzzy Network Zheng TANG Okihiko ISHIZUKA Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/12/20 Vol. E75-A No. 12 pp. 1826-1828 Type of Manuscript: LETTER Category: Fuzzy Theory Keyword: fuzzy logic, adaptive, backpropagation, learning algorithm, multi-layer network, feedforward,
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Learning Capability of T-Model Neural Network Okihiko ISHIZUKA Zheng TANG Tetsuya INOUE Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/07/20 Vol. E75-A No. 7 pp. 931-936 Type of Manuscript: PAPER Category: Neural Networks Keyword: neural network, fully interconnection, half interconnection, feedforward network,
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On Collective Computational Properties of T-Model and Hopfield Neural Networks Okihiko ISHIZUKA Zheng TANG Akihiro TAKEI Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/06/20 Vol. E75-A No. 6 pp. 663-669 Type of Manuscript: Special Section PAPER (Special Section of Papers Selected from 1991 Joint Technical Conference on Circuits/Systems, Computers and Communications (JTC-CSCC '91)) Category: Neural Network Design Keyword: neural network, T-Model, Hopfield model, collective computation,
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Implementing Neural Architectures Using CMOS Current-Mode VLSI Circuits Zheng TANG Okihiko ISHIZUKA Hiroki MATSUMOTO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1991/05/20 Vol. E74-D No. 5 pp. 1329-1336 Type of Manuscript: PAPER Category: Computer Hardware and Design Keyword:
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A Buffer-Based Switched-Capacitor Integrator with Reduced Capacitance Ratio Hiroki MATSUMOTO Zheng TANG Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/04/20 Vol. E73-E No. 4 pp. 494-495 Type of Manuscript: Special Section LETTER (Special Issue on 1990 Spring National Convention IEICE) Category: Electronic Circuit Keyword:
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A Comparator-Based Switched-Capacitor Voltage-to-Frequency Converter Hiroki MATSUMOTO Zheng TANG Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1990/01/20 Vol. E73-E No. 1 pp. 138-139 Type of Manuscript: LETTER Category: Electronic Circuits Keyword:
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The Optimum Design Method of Reliable Networks Hiroshi MASUYAMA Tetsuo ICHIMORI Okihiko ISHIZUKA
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1988/12/20 Vol. E71-E No. 12 pp. 1273-1281 Type of Manuscript: PAPER Category: Ghaphs and Networks Keyword:
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