Design and Evaluation of a NULL-Convention Circuit Based on Dual-Rail Current-Mode Differential Logic Naoya ONIZAWATakahiro HANYU
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-CNo. 11pp. 1575-1580 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: asynchronous logic design,
self-timed circuit,
differential-pair circuit,
delay insensitive,