IEICE SEARCH SYSTEM

Naofumi HOMMA

Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current Yu-ichi HAYASHI Naofumi HOMMA Takaaki MIZUKI Takeshi SUGAWARA Yoshiki KAYANO Takafumi AOKI Shigeki MINEGISHI Akashi SATOH Hideaki SONE Hiroshi INOUE
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2012/06/01 Vol. E95-C No. 6 pp. 1089-1097 Type of Manuscript: PAPER Category: Electronic Components Keyword: information security, electromagnetic information leakage, cryptographic modules, side-channel attacks, common-mode currents,
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A Configurable On-Chip Glitchy-Clock Generator for Fault Injection Experiments Sho ENDO Takeshi SUGAWARA Naofumi HOMMA Takafumi AOKI Akashi SATOH
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2012/01/01 Vol. E95-A No. 1 pp. 263-266 Type of Manuscript: Special Section LETTER (Special Section on Cryptography and Information Security) Category: Keyword: faulty injection attacks, clock glitch, RSA, safe-error attack,
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High-Performance Architecture for Concurrent Error Detection for AES Processors Takeshi SUGAWARA Naofumi HOMMA Takafumi AOKI Akashi SATOH
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2011/10/01 Vol. E94-A No. 10 pp. 1971-1980 Type of Manuscript: PAPER Category: Cryptography and Information Security Keyword: dependable architectures, fault injection attacks, tamper resistance, error detection,
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Multiple-Valued Constant-Power Adder and Its Application to Cryptographic Processor Naofumi HOMMA Yuichi BABA Atsushi MIYAMOTO Takafumi AOKI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/08/01 Vol. E93-D No. 8 pp. 2117-2125 Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing) Category: Application of Multiple-Valued VLSI Keyword: cryptographic processors, side-channel attacks, arithmetic circuits, multiple-valued logic, RSA cryptosystem,
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Arithmetic Circuit Verification Based on Symbolic Computer Algebra Yuki WATANABE Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/10/01 Vol. E91-A No. 10 pp. 3038-3046 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: datapath, arithmetic circuits, formal verification, computer algebra,
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A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks Naofumi HOMMA Sei NAGASHIMA Takeshi SUGAWARA Takafumi AOKI Akashi SATOH
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/01/01 Vol. E91-A No. 1 pp. 193-202 Type of Manuscript: Special Section PAPER (Special Section on Cryptography and Information Security) Category: Side Channel Attacks Keyword: side-channel attacks, DPA, DEMA, cryptographic module, waveform matching, phase-only correlation,
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Formal Design of Arithmetic Circuits Based on Arithmetic Description Language Naofumi HOMMA Yuki WATANABE Takafumi AOKI Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/12/01 Vol. E89-A No. 12 pp. 3500-3509 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Synthesis Keyword: datapaths, formal design, arithmetic circuits, hardware algorithms, hardware description language, module generator,
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Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued Logic Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2006/11/01 Vol. E89-C No. 11 pp. 1645-1654 Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies) Category: Keyword: datapaths, arithmetic circuits, addition algorithms, number systems, multiple-valued logic,
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Counter Tree Diagrams: A Unified Framework for Analyzing Fast Addition Algorithms Jun SAKIYAMA Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-A No. 12 pp. 3009-3019 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: IP Design Keyword: computer arithmetic algorithms, parallel counters, multipliers, datapath, VLSI, circuit synthesis,
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Parallel Evolutionary Design of Constant-Coefficient Multipliers Dingjun CHEN Takafumi AOKI Naofumi HOMMA Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/02/01 Vol. E85-A No. 2 pp. 508-512 Type of Manuscript: LETTER Category: VLSI Design Technology and CAD Keyword: evolutionary graph generation, multiplier, PC clusters, canonical signed-digit (CSD) number representation,
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Evolutionary Synthesis of Fast Constant-Coefficient Multipliers Naofumi HOMMA Takafumi AOKI Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/09/20 Vol. E83-A No. 9 pp. 1767-1777 Type of Manuscript: PAPER Category: Nonlinear Problems Keyword: circuit design, computer arithmetic, arithmetic circuits, evolvable hardware, evolutionary computation,
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Evolutionary Design of Arithmetic Circuits Takafumi AOKI Naofumi HOMMA Tatsuo HIGUCHI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1999/05/20 Vol. E82-A No. 5 pp. 798-806 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: circuit design, computer arithmetic, arithmetic circuits, evolvable hardware, evolutionary computation,
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