Masayuki HIROMOTO


Identification and Application of Invariant Critical Paths under NBTI Degradation
Song BIAN Shumpei MORITA Michihiro SHINTANI Hiromitsu AWANO Masayuki HIROMOTO Takashi SATO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2797-2806
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
NBTIaging effectinvariant critical pathprocessor
 Summary | Full Text:PDF(1.3MB)

Utilization of Path-Clustering in Efficient Stress-Control Gate Replacement for NBTI Mitigation
Shumpei MORITA Song BIAN Michihiro SHINTANI Masayuki HIROMOTO Takashi SATO 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7  pp. 1464-1472
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
NBTI mitigationreliabilitytransistor agingperformance degradationinternal node control
 Summary | Full Text:PDF(936.4KB)

Efficient Aging-Aware SRAM Failure Probability Calculation via Particle Filter-Based Importance Sampling
Hiromitsu AWANO Masayuki HIROMOTO Takashi SATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/07/01
Vol. E99-A  No. 7  pp. 1390-1399
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
SRAM cell yieldfailure probability calculationNBTIimportance samplingparticle filterMonte Carlo method
 Summary | Full Text:PDF(1.7MB)

Fast Estimation of NBTI-Induced Delay Degradation Based on Signal Probability
Song BIAN Michihiro SHINTANI Masayuki HIROMOTO Takashi SATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/07/01
Vol. E99-A  No. 7  pp. 1400-1409
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
NBTIreliabilitystatic timing analysistiming characterizationaging-aware timing library
 Summary | Full Text:PDF(1017.4KB)

An Error Correction Scheme through Time Redundancy for Enhancing Persistent Soft-Error Tolerance of CGRAs
Takashi IMAGAWA Masayuki HIROMOTO Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/07/01
Vol. E98-C  No. 7  pp. 741-750
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
coarse-grained reconfigurable architecturereliabilitytriple modular redundancyimmediate terminationerror-critical period
 Summary | Full Text:PDF(1.4MB)

Automation of Model Parameter Estimation for Random Telegraph Noise
Hirofumi SHIMIZU Hiromitsu AWANO Masayuki HIROMOTO Takashi SATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12  pp. 2383-2392
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
random telegraph noise (RTN)Gaussian mixture model (GMM)expectation-maximization (EM) algorithminformation criteriamodel estimation
 Summary | Full Text:PDF(1.5MB)

Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures
Takashi IMAGAWA Masayuki HIROMOTO Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12  pp. 2524-2532
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
soft errorTMRreliabilitymethodology
 Summary | Full Text:PDF(653KB)