Masanori SHIMASUE

Gate-to-Bulk Overlap Capacitance Extraction and Its Circuit Verification
Masanori SHIMASUE  Yasuo KAWAHARA  Takeshi SANO  Hitoshi AOKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6  pp. 929-932
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
CGBO,  modeling,  extraction,  MOSFET,  simulation, 
  Summary |  Full Text:PDF (659.5KB)
Practical Design and Modeling Procedure of Test Structures for Microwave Bare-Chip Devices
Masanori SHIMASUE  Hitoshi AOKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/01/01
Vol. E87-C  No. 1  pp. 60-65
Type of Manuscript: PAPER
Category: Microwaves, Millimeter-Waves
Keyword: 
RF,  de-embed,  bare-chip,  simulation,  SPICE,  characterizations, 
  Summary |  Full Text:PDF (421.3KB)