Malgorzata MAREK-SADOWSKA


On Improved FPGA Greedy Routing Architectures
Yu-Liang WU Douglas CHANG Malgorzata MAREK-SADOWSKA Shuji TSUKIYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A  No. 12  pp. 2485-2491
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Layout Optimization
Keyword: 
FPGA architectureFPGA Greedy routing architecture
 Summary | Full Text:PDF(723.5KB)

On Regular Segmented 2-D FPGA Routing
Yu-Liang WU Malgorzata MAREK-SADOWSKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10  pp. 1871-1877
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
FPGA routingFPGA architechtureFPGA segmented routing
 Summary | Full Text:PDF(636.9KB)

FOREWORD
Malgorzata MAREK-SADOWSKA Shuji TSUKIYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/12/25
Vol. E78-A  No. 12  pp. 1689-1690
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF(140.8KB)