Makoto NAGATA


Design of Effective Supply Voltage Monitor for Measuring Power Rails of Integrated Circuits
Takeshi OKUMOTO  Kumpei YOSHIKAWA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4  pp. 538-545
Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
noise detection circuitpower supply noisepower supply integritysystems-on-a-chip
  Summary |  Full Text:PDF (2.5MB)

Co-simulation of On-Chip and On-Board AC Power Noise of CMOS Digital Circuits
Kumpei YOSHIKAWA  Yuta SASAKI  Kouji ICHIKAWA  Yoshiyuki SAITO  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A  No. 12  pp. 2284-2291
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
LSI chip-package-board co-designelectromagnetic compatibilitypower supply noisepower delivery network
  Summary |  Full Text:PDF (2.3MB)

FOREWORD
Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6  pp. 977-977
Type of Manuscript: FOREWORD
Category: 
Keyword: 
  Summary |  Full Text:PDF (104.8KB)

Evaluation of SRAM-Core Susceptibility against Power Supply Voltage Variation
Takuya SAWADA  Taku TOSHIKAWA  Kumpei YOSHIKAWA  Hidehiro TAKATA  Koji NII  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 586-593
Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
SRAMImmunityOn chip monitoringBuilt-in self testing
  Summary |  Full Text:PDF (3MB)

Modeling and Analysis of Substrate Noise Coupling in Analog and RF ICs
Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/02/01
Vol. E95-A  No. 2  pp. 430-438
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: INVITED
Keyword: 
substrate noisesubstrate crosstalksubstrate integritypower supply integritymixed analog digital circuitsvery large scale integration
  Summary |  Full Text:PDF (2.9MB)

On-Chip In-Place Measurements of Vth and Signal/Substrate Response of Differential Pair Transistors
Yoji BANDO  Satoshi TAKAYA  Toru OHKAWA  Toshiharu TAKARAMOTO  Toshio YAMADA  Masaaki SOUDA  Shigetaka KUMASHIRO  Tohru MOGAMI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/01/01
Vol. E95-C  No. 1  pp. 137-145
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
on-chip monitorsubstrate noisedifferential amplifier
  Summary |  Full Text:PDF (2.1MB)

On-Chip Single Tone Pseudo-Noise Generator for Analog IP Noise Tolerance Measurement
Masaaki SODA  Yoji BANDO  Satoshi TAKAYA  Toru OHKAWA  Toshiharu TAKARAMOTO  Toshio YAMADA  Shigetaka KUMASHIRO  Tohru MOGAMI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 1024-1031
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
noisesine waveharmonic
  Summary |  Full Text:PDF (1.7MB)

A Diagnosis Testbench of Analog IP Cores for Characterization of Substrate Coupling Strength
Takushi HASHIDA  Yuuki ARAGA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/06/01
Vol. E94-C  No. 6  pp. 1016-1023
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
on-chip diagnosison-chip monitoring
  Summary |  Full Text:PDF (1.8MB)

A Continuous-Time Waveform Monitoring Technique for On-Chip Power Noise Measurements in VLSI Circuits
Yoji BANDO  Satoshi TAKAYA  Toru OHKAWA  Toshiharu TAKARAMOTO  Toshio YAMADA  Masaaki SOUDA  Shigetaka KUMASHIRO  Tohru MOGAMI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4  pp. 495-503
Type of Manuscript: Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
on-chip monitorpower supply noise
  Summary |  Full Text:PDF (2.4MB)

An Arbitrary Digital Power Noise Generator Using 65 nm CMOS Technology
Tetsuro MATSUNO  Daisuke FUJIMOTO  Daisuke KOSAKA  Naoyuki HAMANISHI  Ken TANABE  Masazumi SHIOCHI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6  pp. 820-826
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
noise emulationsubstrate noisepower supply noisesignal integritysubstrate couplingpower integrity
  Summary |  Full Text:PDF (2.7MB)

Chip-to-Chip Half Duplex Spiking Data Communication over Power Supply Rails
Takushi HASHIDA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/06/01
Vol. E93-C  No. 6  pp. 842-848
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
power-line communicationon-chip diagnosissignal integritypower integritymixed-signal circuit
  Summary |  Full Text:PDF (1.9MB)

Modeling of Power Noise Generation in Standard-Cell Based CMOS Digital Circuits
Tetsuro MATSUNO  Daisuke KOSAKA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2  pp. 440-447
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
substrate noisepower supply noisesignal integritysubstrate couplingpower integrity
  Summary |  Full Text:PDF (1.8MB)

Experimental Evaluation of Dynamic Power Supply Noise and Logical Failures in Microprocessor Operations
Mitsuya FUKAZAWA  Masanori KURIMOTO  Rei AKIYAMA  Hidehiro TAKATA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 475-482
Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
power supply voltage noise built-in probing circuitfailure susceptibilitydynamic frequency scaling
  Summary |  Full Text:PDF (1.6MB)

Current-Mode Transceiver with Nonfeedback Clock Recovery Capability for Mobile Applications
Takefumi YOSHIKAWA  Tetsuhiro OGINO  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9  pp. 1453-1462
Type of Manuscript: Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation)
Category: 
Keyword: 
interfacecurrent modelow powerlow EMI noise
  Summary |  Full Text:PDF (2MB)

Measurement-Based Analysis of Electromagnetic Immunity in LSI Circuit Operation
Kouji ICHIKAWA  Yuki TAKAHASHI  Yukihiko SAKURAI  Takahiro TSUDA  Isao IWASE  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/06/01
Vol. E91-C  No. 6  pp. 936-944
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
integrated circuitelectro magnetic interferenceon-chip monitorimmunity
  Summary |  Full Text:PDF (1.5MB)

Chip-Level Substrate Coupling Analysis with Reference Structures for Verification
Daisuke KOSAKA  Makoto NAGATA  Yoshitaka MURASAKA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12  pp. 2651-2660
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword: 
chip-level substrate couplingF-matrix computationslice-and-stack substrate modeling
  Summary |  Full Text:PDF (940.5KB)

On-Chip Multi-Channel Monitoring for Analog Circuit Diagnosis in Systems-on-Chip Integration
Koichiro NOGUCHI  Takushi HASHIDA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1189-1196
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
SoCanalog diagnosison-chip monitor
  Summary |  Full Text:PDF (1.5MB)

Experimental Verification of Power Supply Noise Modeling for EMI Analysis through On-Board and On-Chip Noise Measurements
Kouji ICHIKAWA  Yuki TAKAHASHI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1282-1290
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
large scale integrationelectro magnetic interferenceprinted circuit boardsignal integritypower supply integrityintegrated analysis
  Summary |  Full Text:PDF (2.3MB)

A Mixed Circuit and System Level Simulation Technique of Collision-Resistant RFID System
Yohei FUKUMIZU  Naoki GOCHI  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/06/01
Vol. E90-C  No. 6  pp. 1299-1303
Type of Manuscript: Special Section LETTER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
RFIDanti-collisionTH-CDMAintegrated multi-level simulation environmentbehavioral modelingVerilog-AMS
  Summary |  Full Text:PDF (677KB)

Substrate-Noise and Random-Variability Reduction with Self-Adjusted Forward Body Bias
Yoshihide KOMATSU  Koichiro ISHIBASHI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 692-698
Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
substrate noiserandom variabilityforward body biasself adjustedimpuritieslatch-upCMOSSoC
  Summary |  Full Text:PDF (2.2MB)

Asymmetric Slope Dual Mode Differential Logic Circuit for Compatibility of Low-Power and High-Speed Operations
Masao MORIMOTO  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 675-682
Type of Manuscript: Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Digital
Keyword: 
ASDMDLdifferential logichigh-speed logiclow-power logic
  Summary |  Full Text:PDF (567.8KB)

Evaluation of Isolation Structures against High-Frequency Substrate Coupling in Analog/Mixed-Signal Integrated Circuits
Daisuke KOSAKA  Makoto NAGATA  Yoshitaka MURASAKA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/02/01
Vol. E90-A  No. 2  pp. 380-387
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
substrate couplingequivalent circuit modelingguard ringguard banddeep n-wellsubstrate noise analysisS21 measurementF-matrix computation
  Summary |  Full Text:PDF (746.9KB)

An Integrated Timing and Dynamic Supply Noise Verification for Multi-10-Million Gate SoC Designs
Kenji SHIMAZAKI  Makoto NAGATA  Mitsuya FUKAZAWA  Shingo MIYAHARA  Masaaki HIRATA  Kazuhiro SATOH  Hiroyuki TSUJIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1535-1543
Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
power-supply noiseground noisenoise detectordynamic IR droptiming analysis
  Summary |  Full Text:PDF (1.6MB)

Measurement-Based Analysis of Delay Variation Induced by Dynamic Power Supply Noise
Mitsuya FUKAZAWA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1559-1566
Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
delay variationdynamic power supply noisestatic IR dropon-chip waveform monitor circuitsignal integrity
  Summary |  Full Text:PDF (938KB)

Back-End Design of a Collision-Resistive RFID System through High-Level Modeling Approach
Yohei FUKUMIZU  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/11/01
Vol. E89-C  No. 11  pp. 1581-1590
Type of Manuscript: Special Section PAPER (Special Section on Novel Device Architectures and System Integration Technologies)
Category: 
Keyword: 
RFIDanti-collisionTH-CDMAhigh-level modelingback-end designtop-down approachrobustness
  Summary |  Full Text:PDF (1.5MB)

An On-Chip Multi-Channel Rail-to-Rail Signal Monitoring Technique for Sub-100-nm Digital Signal Integrity
Koichiro NOGUCHI  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6  pp. 761-768
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
signal integritysubstrate crosstalkdelay variationon-chip monitor
  Summary |  Full Text:PDF (1.1MB)

Multi-Ported Register File for Reducing the Impact of PVT Variation
Yuuichirou IKEDA  Masaya SUMITA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 356-363
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: Signal Integrity and Variability
Keyword: 
multi-ported register fileself timing circuitsPVT variationcrosstalk noise
  Summary |  Full Text:PDF (1.3MB)

Communication Scheme for a Highly Collision-Resistive RFID System
Yohei FUKUMIZU  Shuji OHNO  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/02/01
Vol. E89-A  No. 2  pp. 408-415
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
RFIDanti-collisionTD-CDMAlow-powerimpulse modulationinductive couplinghardware emulation
  Summary |  Full Text:PDF (721.4KB)

Logic Synthesis Technique for High Speed Differential Dynamic Logic with Asymmetric Slope Transition
Masao MORIMOTO  Yoshinori TANAKA  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3324-3331
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
logic synthesisASDDLasymmetric slopedifferential logichigh speed
  Summary |  Full Text:PDF (728.2KB)

High-Speed Digital Circuit Design Using Differential Logic with Asymmetric Signal Transition
Masao MORIMOTO  Makoto NAGATA  Kazuo TAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/10/01
Vol. E88-C  No. 10  pp. 2001-2008
Type of Manuscript: PAPER
Category: Electronic Circuits
Keyword: 
ASDDLASD-CMOSasymmetric slopedifferential logichigh speed
  Summary |  Full Text:PDF (778.1KB)

Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits
Kenji SHIMAZAKI  Makoto NAGATA  Takeshi OKUMOTO  Shozo HIRANO  Hiroyuki TSUJIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4  pp. 589-596
Type of Manuscript: Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
substrate noisepower-supply noiseground noisenoise detectordynamic IR drop
  Summary |  Full Text:PDF (1.2MB)

Pulse Modulation Techniques for Nonlinear Dynamical Systems and a CMOS Chaos Circuit with Arbitrary 1-D Maps
Takashi MORIE  Kenichi MURAKOSHI  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/11/01
Vol. E87-C  No. 11  pp. 1856-1862
Type of Manuscript: Special Section PAPER (Special Section on New System Paradigms for Integrated Electronics)
Category: 
Keyword: 
CMOS analog integrated circuitsnonlinear circuitsnonlinear functionspulse width modulationpulse phase modulationchaos
  Summary |  Full Text:PDF (499KB)

An Hadamard Transform Chip Using the PWM Circuit Technique and Its Application to Image Processing
Kousuke KATAYAMA  Atsushi IWATA  Takashi MORIE  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C  No. 8  pp. 1596-1603
Type of Manuscript: Special Section PAPER (Special Issue on High-Performance Analog Integrated Circuits)
Category: 
Keyword: 
Hadamard transformimage sensorpulse width modulation techniquecharge sharing
  Summary |  Full Text:PDF (965.5KB)

Image Segmentation/Extraction Using Nonlinear Cellular Networks and Their VLSI Implementation Using Pulse-Modulation Techniques
Hiroshi ANDO  Takashi MORIE  Makoto MIYAKE  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Vol. E85-A  No. 2  pp. 381-388
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
resistive-fuse networkoscillator networkimage segmentationimage extractionpulse modulation circuit
  Summary |  Full Text:PDF (1.2MB)

A CMOS Stochastic Associative Processor Using PWM Chaotic Signals
Toshio YAMANAKA  Takashi MORIE  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/12/01
Vol. E84-C  No. 12  pp. 1723-1729
Type of Manuscript: Special Section PAPER (Special Issue on Integrated Systems with New Concepts)
Category: 
Keyword: 
pulse-width modulationPWMchaotic signalsstochastic association
  Summary |  Full Text:PDF (874.7KB)

Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications
Atsushi IWATA  Takashi MORIE  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/02/01
Vol. E84-A  No. 2  pp. 486-496
Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques Supporting the System LSI Era)
Category: 
Keyword: 
pulse modulationmixed analog-digital integrated circuitsnonlinear dynamical systemsswitched current integrationtime-domain signal processing
  Summary |  Full Text:PDF (666.6KB)

A Nonlinear Oscillator Network for Gray-Level Image Segmentation and PWM/PPM Circuits for Its VLSI Implementation
Hiroshi ANDO  Takashi MORIE  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/02/20
Vol. E83-A  No. 2  pp. 329-336
Type of Manuscript: Special Section PAPER (Special Section on Intelligent Signal and Image Processing)
Category: 
Keyword: 
nonlinear oscillator networkLEGIONimage segmentationpulse modulationPWMPPMLSI implementation
  Summary |  Full Text:PDF (3.3MB)

New Non-Volatile Analog Memory Circuits Using PWM Methods
Shigeo KINOSHITA  Takashi MORIE  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/20
Vol. E82-C  No. 9  pp. 1655-1661
Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Non-Binary Architectures
Keyword: 
analog memoryfloating gate devicepulse width modulationPWM
  Summary |  Full Text:PDF (776.1KB)

Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design
Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/20
Vol. E82-A  No. 2  pp. 271-278
Type of Manuscript: INVITED PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog-digital mixed LSIsubstrate noisecrosstalkAnalogHDLbehavioral modelingmacroscopic substrate noise modelΔΣADC
  Summary |  Full Text:PDF (519.9KB)

An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique
Takashi MORIE  Jun FUNAKOSHI  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/20
Vol. E82-A  No. 2  pp. 356-363
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
LSI implementationneural networkpulse width modulationPWM
  Summary |  Full Text:PDF (1MB)

A Stochastic Associative Memory Using Single-Electron Tunneling Devices
Makoto SAEN  Takashi MORIE  Makoto NAGATA  Atsushi IWATA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/01/20
Vol. E81-C  No. 1  pp. 30-35
Type of Manuscript: Special Section PAPER (Special Issue on Technology Challenges for Single Electron Devices)
Category: 
Keyword: 
associative memorysingle-electron tunnelingSETsingle-electron transistor
  Summary |  Full Text:PDF (480.4KB)

A Concept of Analog-Digital Merged Circuit Architecture for Future VLSI's
Atsushi IWATA  Makoto NAGATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/02/20
Vol. E79-A  No. 2  pp. 145-157
Type of Manuscript: Special Section PAPER (Special Section on Analog Technologies in Submicron Era)
Category: 
Keyword: 
pulse width modulation (PWM)switched current integratorPWM adderPWM signal converter
  Summary |  Full Text:PDF (1.1MB)