Lan-Rong DUNG


Wide-Range Motion Estimation Architecture with Dual Search Windows or High Resolution Video Coding
Lan-Rong DUNG Meng-Chun LIN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/12/01
Vol. E91-A  No. 12  pp. 3638-3650
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Embedded, Real-Time and Reconfigurable Systems
Keyword: 
motion estimationMPEGvideo compressionbandwidth
 Summary | Full Text:PDF(1.4MB)

A Parallel-In Folding Technique for High-Order FIR Filter Implementation
Lan-Rong DUNG Hsueh-Chih YANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12  pp. 3659-3665
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
FIRVLSI hardwaredigital filters
 Summary | Full Text:PDF(492.6KB)

Dynamic Range Improvement of Multistage Multibit ΣΔ Modulator for Low Oversampling Ratios
Teng-Hung CHANG Lan-Rong DUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/02/01
Vol. E88-A  No. 2  pp. 451-460
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
ΣΔ modulatorsanalog-to-digital converters (ADCs)multistage (MASH)multibit quantizerdynamic range improvement
 Summary | Full Text:PDF(2.1MB)

An IP Synthesizer for Limited-Resource DWT Processor
Lan-Rong DUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3047-3056
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: System Level Design
Keyword: 
discrete wavelet transformVLSIsilicon intelligent propertyDSPcomputer architecture
 Summary | Full Text:PDF(1.7MB)

On Multiple-Voltage High-Level Synthesis Using Algorithmic Transformations
Lan-Rong DUNG Hsueh-Chih YANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3100-3108
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
multiple voltage schedulinglow-power circuitloop shrinkingretimingunfoldinghigh-level synthesis
 Summary | Full Text:PDF(833.7KB)