Kunihiro FUJIYOSHI


Photo-Diode Array Partitioning Problem for a Rectangular Region
Kunihiro FUJIYOSHI Takahisa IMANO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2851-2856
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
partitioningphoto diode arrayHamiltonian pathdivide and conquer
 Summary | Full Text:PDF(857.6KB)

A Method of Analog IC Placement with Common Centroid Constraints
Keitaro UE Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/01/01
Vol. E97-A  No. 1  pp. 339-346
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
analog circuitsplacementsymmetry constraintssequence-pair
 Summary | Full Text:PDF(1.1MB)

Placement with Symmetry Constraints for Analog IC Layout Design Based on Tree Representation
Natsumi HIRAKAWA Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/02/01
Vol. E92-A  No. 2  pp. 467-474
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
analog placementsymmetry constraintO-tree
 Summary | Full Text:PDF(315.4KB)

The O-Sequence:Representation of 3D-Dissection
Hidenori OHTA Toshinori YAMADA Chikaaki KODAMA Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/08/01
Vol. E91-A  No. 8  pp. 2111-2119
Type of Manuscript:  PAPER
Category: Algorithms and Data Structures
Keyword: 
rectangular solid dissectionrectangular dissection3D-VLSI2D-dissection3D-dissectionQ-sequenceO-sequence
 Summary | Full Text:PDF(784.6KB)

A Graph Based Soft Module Handling in Floorplan
Hiroaki ITOGA Chikaaki KODAMA Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3390-3397
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Floorplan and Placement
Keyword: 
floorplansoft modulecompaction graphslack
 Summary | Full Text:PDF(378.4KB)

Minimizing the Number of Empty Rooms on Floorplan by Dissection Line Merge
Chikaaki KODAMA Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1389-1396
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Programmable Logic, VLSI, CAD and Layout
Keyword: 
empty roomdissection linerectangular dissectionfloorplanmodule placement
 Summary | Full Text:PDF(1.2MB)

An Improved Method of Convex Rectilinear Block Packing Based on Sequence-Pair
Kazuya WAKATA Hiroaki SAITO Kunihiro FUJIYOSHI Keishi SAKANUSHI Takayuki OBATA Chikaaki KODAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3148-3157
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Place and Routing
Keyword: 
packingsequence-pairconvex rectilinear block
 Summary | Full Text:PDF(571.5KB)

An Efficient Decoding Method of Sequence-Pair with Reduced Redundancy
Chikaaki KODAMA Kunihiro FUJIYOSHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A  No. 12  pp. 2785-2794
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword: 
packingfloorplansequence-pairQ-sequence
 Summary | Full Text:PDF(480.4KB)