Koichi TANNO


Subblock-Level Matching Layout for Analog Block-Pair and Its Layout-Dependent Manufacturability Evaluation
Takuya HIRATA Ryuta NISHINO Shigetoshi NAKATAKE Masaya SHIMOYAMA Masashi MIYAGAWA Ryoichi MIYAUCHI Koichi TANNO Akihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/07/01
Vol. E99-A  No. 7  pp. 1381-1389
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
instrumentation amplifierlayout-dependent manufacturabilityanalog layoutmatching layout
 Summary | Full Text:PDF(4.4MB)

A Study on Gaze Estimation System of the Horizontal Angle Using Electrooculogram Signals
Mingmin YAN Hiroki TAMURA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2014/09/01
Vol. E97-D  No. 9  pp. 2330-2337
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Circuit Implementations
Keyword: 
electrooculogram signalgaze estimationmathematical modeldrift
 Summary | Full Text:PDF(2.6MB)

A Low-Power and High-Linear Current to Time Converter for Wireless Sensor Networks
Ryota SAKAMOTO Koichi TANNO Hiroki TAMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/06/01
Vol. E95-A  No. 6  pp. 1088-1090
Type of Manuscript:  LETTER
Category: Circuit Theory
Keyword: 
current to time convertertemperature sensoranalog to digital converterCMOS analog circuit
 Summary | Full Text:PDF(297.3KB)

Optimization and Verification of Current-Mode Multiple-Valued Digit ORNS Arithmetic Circuits
Motoi INABA Koichi TANNO Hiroki TAMURA Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8  pp. 2073-2079
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Multiple-Valued VLSI Technology
Keyword: 
multiple-valued logicoverlap resolution number systemcurrent-mode circuitweak-inversion region
 Summary | Full Text:PDF(678.3KB)

Design of CMOS OTAs for Low-Voltage and Low-Power Application
Hisashi TANAKA Koichi TANNO Hiroki TAMURA Kenji MURAO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/11/01
Vol. E91-A  No. 11  pp. 3385-3388
Type of Manuscript:  LETTER
Category: Analog Signal Processing
Keyword: 
weak inversion regionOTAlow-voltagelow-powerhigh-linearity
 Summary | Full Text:PDF(258.9KB)

Midpoint-Validation Method for Support Vector Machine Classification
Hiroki TAMURA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2008/07/01
Vol. E91-D  No. 7  pp. 2095-2098
Type of Manuscript:  LETTER
Category: Biocybernetics, Neurocomputing
Keyword: 
support vector machinemidpoint-validationpattern classification problem
 Summary | Full Text:PDF(260.3KB)

Linear and Compact Floating Node Voltage-Controlled Variable Resistor Circuit
Muneo KUSHIMA Motoi INABA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/02/01
Vol. E89-A  No. 2  pp. 459-460
Type of Manuscript:  Special Section LETTER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog integrated circuitsfloating nodevoltage-controlled variable resistor circuit
 Summary | Full Text:PDF(85.2KB)

Low-Voltage, Low-Distortion and Rail-to-Rail CMOS Sample and Hold Circuit
Koichi TANNO Kiminobu SATO Hisashi TANAKA Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/10/01
Vol. E88-A  No. 10  pp. 2696-2698
Type of Manuscript:  Special Section LETTER (Special Section on Nonlinear Theory and its Applications)
Category: 
Keyword: 
sample hold circuitlow-voltage circuitsboost circuitsMOS analog integrated circuitsanalog circuits
 Summary | Full Text:PDF(257.1KB)

Combiner-Based MOS OTAs
Koichi TANNO Kenya KONDO Okihiko ISHIZUKA Takako TOYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/06/01
Vol. E88-A  No. 6  pp. 1622-1625
Type of Manuscript:  LETTER
Category: Analog Signal Processing
Keyword: 
OTAoperational transconductance amplifiercombinerCMOS analog integrated circuits
 Summary | Full Text:PDF(257.3KB)

Wide-Input Range Variable Resistor Circuit Using an FG-MOSFET
Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 3294-3296
Type of Manuscript:  LETTER
Category: Analog Signal Processing
Keyword: 
analog integrated circuitsfloating-gate MOSFET (FG-MOSFET)variable resistor circuitwide-input range
 Summary | Full Text:PDF(183.7KB)

Wide Input-Range Four-Quadrant Analog Multiplier Using Floating-Gate MOSFET's
Dasong ZHU Koichi TANNO Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/07/01
Vol. E86-A  No. 7  pp. 1759-1765
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
analog multiplierwide input-rangeFG-MOSFET
 Summary | Full Text:PDF(520.6KB)

Low-Power and Wide-Input Range Voltage Controlled Linear Variable Resistor Using an FG-MOSFET and Its Application
Muneo KUSHIMA Koichi TANNO Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A  No. 2  pp. 342-349
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog integrated circuitsfloating-gate MOSFET (FG-MOSFET)voltage-controlled linear variable resistor (VCLVR)low-power and wide-input range
 Summary | Full Text:PDF(631.1KB)

A High-Speed Binary to Residue Converter Using a Signed-Digit Number Representation
Makoto SYUTO Eriko SATAKE Koichi TANNO Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/05/01
Vol. E85-D  No. 5  pp. 903-905
Type of Manuscript:  LETTER
Category: VLSI Systems
Keyword: 
residue number systemsigned-digit number representationbinary to residue convertercarry-free addition
 Summary | Full Text:PDF(631.6KB)

Analog Inverter with Neuron-MOS Transistors and Its Application
Motoi INABA Koichi TANNO Okihiko ISHIZUKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/02/01
Vol. E85-A  No. 2  pp. 360-365
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog inverterdown literal circuitNOT functionMAX functionMIN function
 Summary | Full Text:PDF(314.8KB)

A Multiple-Valued Immune Network and Its Applications
Zheng TANG Takayuki YAMAGUCHI Koichi TASHIMA Okihiko ISHIZUKA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/06/25
Vol. E82-A  No. 6  pp. 1102-1108
Type of Manuscript:  PAPER
Category: Neural Networks
Keyword: 
multiple-valuedimmune networkimmune responsepattern recognition
 Summary | Full Text:PDF(772.1KB)

A 1-V, 1-Vp-p Input Range, Four-Quadrant Analog Multiplier Using Neuron-MOS Transistors
Koichi TANNO Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/05/25
Vol. E82-C  No. 5  pp. 750-757
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
multiplierlow voltagelow powerneuron MOS transistoranalog integrated circuit
 Summary | Full Text:PDF(435KB)

Neuron-MOS Current Mirror Circuit and Its Application to Multi-Valued Logic
Jing SHEN Koichi TANNO Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/05/25
Vol. E82-D  No. 5  pp. 940-948
Type of Manuscript:  Special Section PAPER (Special Issue on Multiple-Valued Logic and Its Applications)
Category: Circuits
Keyword: 
neuron MOS transistormulti-valued logiccurrent-mode circuitcurrent mirrorcurrent comparatorthreshold detectorT-gateintegrated circuit
 Summary | Full Text:PDF(1.1MB)

Ultra-Low Power Two-MOS Virtual-Short Circuit and Its Application
Koichi TANNO Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/10/25
Vol. E81-A  No. 10  pp. 2194-2200
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
virtual-shortweak-inversion regionlow powerlow voltageCMOS analog circuitintegrated circuit
 Summary | Full Text:PDF(565.6KB)

Neuron-MOSVT Cancellation Circuit and Its Application to a Low-Power and High-Swing Cascode Current Mirror
Koichi TANNO Jing SHEN Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/01/25
Vol. E81-A  No. 1  pp. 110-116
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
neuron-MOS transistorthreshold voltageCMOS analog circuitcircuit theory and designintegrated circuit
 Summary | Full Text:PDF(561.3KB)

1: n2 MOS Cascode Circuits and Their Applications
Koichi TANNO Okihiko ISHIZUKA Zheng TANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/12/25
Vol. E79-A  No. 12  pp. 2159-2165
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
MOS analog circuitMOS LSIcircuit theory and designintegrated circuitthreshold voltage
 Summary | Full Text:PDF(514.6KB)

Design and Implementation of a Calibrating T-Model Neural-Based A/D Converter
Zheng TANG Yuichi SHIRATA Okihiko ISHIZUKA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/04/25
Vol. E79-A  No. 4  pp. 553-559
Type of Manuscript:  PAPER
Category: Analog Signal Processing
Keyword: 
neural networksHopfield modelcalibratingA/D converter
 Summary | Full Text:PDF(580.9KB)

Hopfield Neural Network Learning Using Direct Gradient Descent of Energy Function
Zheng TANG Koichi TASHIMA Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/02/25
Vol. E79-A  No. 2  pp. 258-261
Type of Manuscript:  LETTER
Category: Neural Networks
Keyword: 
neural networksgradient descent learningHopfield modelanalog-to-digital conversionassociative memory
 Summary | Full Text:PDF(247.7KB)

Implementation of T-Model Neural-Based PCM Encoders Using MOS Charge-Mode Circuits
Zheng TANG Hirofumi HEBISHIMA Okihiko ISHIZUKA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/10/25
Vol. E78-A  No. 10  pp. 1345-1349
Type of Manuscript:  Special Section LETTER (Special Section on Nonlinear Theory and Its Applications)
Category: 
Keyword: 
neural networkT-ModelPCM encoder networkHopfield modelMOS charge-mode circuits
 Summary | Full Text:PDF(246.6KB)

Design of a Novel MOS VT Extractor Circuit
Koichi TANNO Okihiko ISHIZUKA Zhen TANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9  pp. 1306-1310
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
MOS analog circuitthreshold voltageMOS LSIcircuit theory and designintegrated circuit
 Summary | Full Text:PDF(313.6KB)

A Learning Fuzzy Network and Its Applications to Inverted Pendulum System
Zheng TANG Yasuyoshi KOBAYASHI Okihiko ISHIZUKA Koichi TANNO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1995/06/25
Vol. E78-A  No. 6  pp. 701-707
Type of Manuscript:  PAPER
Category: Systems and Control
Keyword: 
fuzzy networklearningfuzzy controllerback propagation
 Summary | Full Text:PDF(647.7KB)