Kiyoshi TAKEUCHI


Impact of Discrete-Charge-Induced Variability on Scaled MOS Devices
Kiyoshi TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C  No. 4  pp. 414-420
Type of Manuscript:  INVITED PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
variabilityreliabilityrandom dopant fluctuationrandom telegraph noise
 Summary | Full Text:PDF(924.3KB)

Source/Drain Optimization of Double Gate FinFET Considering GIDL for Low Standby Power Devices
Katsuhiko TANAKA Kiyoshi TAKEUCHI Masami HANE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4  pp. 842-847
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Device
Keyword: 
FinFETdouble gateGIDLdevice simulationLSTP
 Summary | Full Text:PDF(616.8KB)

Modeling of Channel Boron Distribution in Deep Sub-0.1 µm n-MOSFETs
Shigetaka KUMASHIRO Hironori SAKAMOTO Kiyoshi TAKEUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/06/25
Vol. E82-C  No. 6  pp. 813-820
Type of Manuscript:  Special Section PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
deep sub-0.1 [µm] n-MOSFETreverse short channel effectpoint-defect pair diffusion modelinverse modeling
 Summary | Full Text:PDF(745.8KB)

0.15 µm CMOS Devices with Reduced Junction Capacitance
Akira TANABE Kiyoshi TAKEUCHI Toyoji YAMAMOTO Takeo MATSUKI Takemitsu KUNIO Masao FUKUMA Ken NAKAJIMA Naoki AIZAKI Hidenobu MIYAMOTO Eiji IKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/03/25
Vol. E78-C  No. 3  pp. 267-273
Type of Manuscript:  Special Section PAPER (Special Issue on Sub-1/4 Micron Device and Process Technologies)
Category: 
Keyword: 
CMOSEB lithographyTi salicideSPICE
 Summary | Full Text:PDF(690.1KB)