Kiyoshi OGURI


Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm
Theint Theint THU Jimpei HAMAMURA Rie SOEJIMA Yuichiro SHIBATA Kiyoshi OGURI 
Publication:   
Publication Date: 2017/07/01
Vol. E100-A  No. 7  pp. 1409-1417
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
RANSACFPGACramer's ruleGauss-Jordan elimination
 Summary | Full Text:PDF(1MB)

Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration
Keisuke DOHI Koji OKINA Rie SOEJIMA Yuichiro SHIBATA Kiyoshi OGURI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/02/01
Vol. E98-D  No. 2  pp. 298-308
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Application
Keyword: 
high-level synthesisFPGAstencil computationheat conduction simulation
 Summary | Full Text:PDF(1.4MB)

FPGA Implementation of Human Detection by HOG Features with AdaBoost
Keisuke DOHI Kazuhiro NEGI Yuichiro SHIBATA Kiyoshi OGURI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/08/01
Vol. E96-D  No. 8  pp. 1676-1684
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Application
Keyword: 
histogram of oriented gradientsAdaBoosthuman detectionFPGA
 Summary | Full Text:PDF(1.1MB)

Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation
Keisuke DOHI Yuichiro SHIBATA Kiyoshi OGURI Takafumi FUJIMOTO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12  pp. 2787-2795
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Parallel and Distributed Computing
Keyword: 
absorbing boundary conditionperfectly matched layerFDTDGPU
 Summary | Full Text:PDF(700KB)

Evaluation and Comparison of Implementation Alternatives for Look-up Tables for Plastic Cell Architecture
Jun'ichiro TAKEMOTO Toshihiro GOTO Yuichiro SHIBATA Kiyoshi OGURI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5  pp. 850-858
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
look-up tablestatic memoryreconfigurable devicetransmission gate
 Summary | Full Text:PDF(763.5KB)

Dynamically Reconfigurable Logic LSI--PCA-1: The First Realization of the Plastic Cell Architecture
Hideyuki ITO Ryusuke KONISHI Hiroshi NAKADA Kiyoshi OGURI Minoru INAMORI Akira NAGOYA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/05/01
Vol. E86-D  No. 5  pp. 859-867
Type of Manuscript:  Special Section PAPER (Special Issue on Reconfigurable Computing)
Category: 
Keyword: 
reconfigurable computingautonomous reconfigurabilityasynchronous circuit design
 Summary | Full Text:PDF(847.5KB)

A Method of Mapping Finite State Machine into PCA Plastic Parts
Minoru INAMORI Hiroshi NAKADA Ryusuke KONISHI Akira NAGOYA Kiyoshi OGURI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4  pp. 804-810
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
asynchronous designfinite state machinemappingprogrammable device
 Summary | Full Text:PDF(633.4KB)

Programmable Dataflow Computing on PCA
Norbert IMLIG Tsunemichi SHIOZAWA Ryusuke KONISHI Kiyoshi OGURI Kouichi NAGAMI Hideyuki ITO Minoru INAMORI Hiroshi NAKADA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/12/25
Vol. E83-A  No. 12  pp. 2409-2416
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Architecture
Keyword: 
programmable logic devicesdataflow computingparallel processingplastic cell architecture
 Summary | Full Text:PDF(542.4KB)

Plastic Cell Architecture: A Scalable Device Architecture for General-Purpose Reconfigurable Computing
Kouichi NAGAMI Kiyoshi OGURI Tsunemichi SHIOZAWA Hideyuki ITO Ryusuke KONISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9  pp. 1431-1437
Type of Manuscript:  Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
reconfigurable computingFPGAsobject-orientedhardware description languagecellular automata
 Summary | Full Text:PDF(687.8KB)

Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing
Hideyuki ITO Kouichi NAGAMI Tsunemichi SHIOZAWA Kiyoshi OGURI Yukihiro NAKAMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A  No. 3  pp. 487-493
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
super fine-grain parallel processingFPGAhigh level synthesize PARTHENONinverter reductiondynamical system
 Summary | Full Text:PDF(572.4KB)

Test Synthesis from Behavioral Description Based on Data Transfer Analysis
Mitsuteru YUKISHITA Kiyoshi OGURI Tsukasa KAWAOKA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/03/25
Vol. E78-D  No. 3  pp. 248-251
Type of Manuscript:  Special Section LETTER (Special Issue on Synthesis and Verification of Hardware Design)
Category: 
Keyword: 
computer hardware and designhardware description languagetest synthesisSFL
 Summary | Full Text:PDF(252KB)

High-Level Synthesis Design at NTT Systems Labs
Yukihiro NAKAMURA Kiyoshi OGURI Akira NAGOYA Mitsuteru YUKISHITA Ryo NOMURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D  No. 9  pp. 1047-1054
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: High-Level Design
Keyword: 
computer-hardware and disign
 Summary | Full Text:PDF(752KB)

Algorithms for Multiplexers Assignment after Scheduling and Allocation Steps
Hiroshi SEKIGAWA Kiyoshi OGURI Ryo NOMURA Yukihiro NAKAMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A  No. 10  pp. 1202-1211
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
computer hardware and design
 Summary | Full Text:PDF(764.9KB)