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Kiyoshi OGURI

Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation Keisuke DOHI Yuichiro SHIBATA Kiyoshi OGURI Takafumi FUJIMOTO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2012/12/01 Vol. E95-D No. 12 pp. 2787-2795 Type of Manuscript: Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking) Category: Parallel and Distributed Computing Keyword: absorbing boundary condition, perfectly matched layer, FDTD, GPU,
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Evaluation and Comparison of Implementation Alternatives for Look-up Tables for Plastic Cell Architecture Jun'ichiro TAKEMOTO Toshihiro GOTO Yuichiro SHIBATA Kiyoshi OGURI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2003/05/01 Vol. E86-D No. 5 pp. 850-858 Type of Manuscript: Special Section PAPER (Special Issue on Reconfigurable Computing) Category: Keyword: look-up table, static memory, reconfigurable device, transmission gate,
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Dynamically Reconfigurable Logic LSI--PCA-1: The First Realization of the Plastic Cell Architecture Hideyuki ITO Ryusuke KONISHI Hiroshi NAKADA Kiyoshi OGURI Minoru INAMORI Akira NAGOYA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2003/05/01 Vol. E86-D No. 5 pp. 859-867 Type of Manuscript: Special Section PAPER (Special Issue on Reconfigurable Computing) Category: Keyword: reconfigurable computing, autonomous reconfigurability, asynchronous circuit design,
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A Method of Mapping Finite State Machine into PCA Plastic Parts Minoru INAMORI Hiroshi NAKADA Ryusuke KONISHI Akira NAGOYA Kiyoshi OGURI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/04/01 Vol. E85-A No. 4 pp. 804-810 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: asynchronous design, finite state machine, mapping, programmable device,
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Programmable Dataflow Computing on PCA Norbert IMLIG Tsunemichi SHIOZAWA Ryusuke KONISHI Kiyoshi OGURI Kouichi NAGAMI Hideyuki ITO Minoru INAMORI Hiroshi NAKADA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/20 Vol. E83-A No. 12 pp. 2409-2416 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: VLSI Architecture Keyword: programmable logic devices, dataflow computing, parallel processing, plastic cell architecture,
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Plastic Cell Architecture: A Scalable Device Architecture for General-Purpose Reconfigurable Computing Kouichi NAGAMI Kiyoshi OGURI Tsunemichi SHIOZAWA Hideyuki ITO Ryusuke KONISHI
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/20 Vol. E81-C No. 9 pp. 1431-1437 Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: reconfigurable computing, FPGAs, object-oriented, hardware description language, cellular automata,
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Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing Hideyuki ITO Kouichi NAGAMI Tsunemichi SHIOZAWA Kiyoshi OGURI Yukihiro NAKAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/03/20 Vol. E80-A No. 3 pp. 487-493 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems) Category: Keyword: super fine-grain parallel processing, FPGA, high level synthesize PARTHENON, inverter reduction, dynamical system,
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Test Synthesis from Behavioral Description Based on Data Transfer Analysis Mitsuteru YUKISHITA Kiyoshi OGURI Tsukasa KAWAOKA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1995/03/20 Vol. E78-D No. 3 pp. 248-251 Type of Manuscript: Special Section LETTER (Special Issue on Synthesis and Verification of Hardware Design) Category: Keyword: computer hardware and design, hardware description language, test synthesis, SFL,
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High-Level Synthesis Design at NTT Systems Labs Yukihiro NAKAMURA Kiyoshi OGURI Akira NAGOYA Mitsuteru YUKISHITA Ryo NOMURA
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1993/09/20 Vol. E76-D No. 9 pp. 1047-1054 Type of Manuscript: Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design) Category: High-Level Design Keyword: computer-hardware and disign,
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Algorithms for Multiplexers Assignment after Scheduling and Allocation Steps Hiroshi SEKIGAWA Kiyoshi OGURI Ryo NOMURA Yukihiro NAKAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1992/10/20 Vol. E75-A No. 10 pp. 1202-1211 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: computer hardware and design,
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