Kenichi IWATA


A 197mW 70ms-Latency Full-HD 12-Channel Video-Processing SoC in 16nm CMOS for In-Vehicle Information Systems
Seiji MOCHIZUKI Katsushige MATSUBARA Keisuke MATSUMOTO Chi Lan Phuong NGUYEN Tetsuya SHIBAYAMA Kenichi IWATA Katsuya MIZUMOTO Takahiro IRITA Hirotaka HARA Toshihiro HATTORI 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2878-2887
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
video processingautomotivelow latencymemory-access-data compression
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