IEICE SEARCH SYSTEM

Kazunori SAITO

Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor Takeshi KUMAKI Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Yasuto KURODA Takayuki GYOHTEN Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2008/09/01 Vol. E91-C No. 9 pp. 1409-1418 Type of Manuscript: Special Section PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation) Category: Keyword: content addressable memory, CAM, matrix-processing architecture, SIMD, bit-serial and word-parallel, table-lookup coding, DCT, Huffman coding, JPEG,
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Acceleration of DCT Processing with Massive-Parallel Memory-Embedded SIMD Matrix Processor Takeshi KUMAKI Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Yasuto KURODA Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/08/01 Vol. E90-D No. 8 pp. 1312-1315 Type of Manuscript: LETTER Category: Image Processing and Video Processing Keyword: DCT, fast DCT, matrix-processing engine, SIMD, bit-serial and word-parallel,
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Real-Time Huffman Encoder with Pipelined CAM-Based Data Path and Code-Word-Table Optimizer Takeshi KUMAKI Yasuto KURODA Masakatsu ISHIZAKI Tetsushi KOIDE Hans Jurgen MATTAUSCH Hideyuki NODA Katsumi DOSAKA Kazutami ARIMOTO Kazunori SAITO
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/01/01 Vol. E90-D No. 1 pp. 334-345 Type of Manuscript: PAPER Category: Image Processing and Video Processing Keyword: content addressable memory, CAM, Huffman coding, parallel processing, pipeline, code word table,
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Proximity Effect Correction in EB Lithography Using Pattern Shape Adjustment Techniques Naoshi SUGIYAMA Kazunori SAITOH
Publication: IEICE TRANSACTIONS (1976-1990) Publication Date: 1980/03/20 Vol. E63-E No. 3 pp. 198-203 Type of Manuscript: PAPER Category: Integrated Circuits Keyword:
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