Katsuyoshi MIURA


New Approach of Laser-SQUID Microscopy to LSI Failure Analysis
Kiyoshi NIKAWA Shouji INOUE Tatsuoki NAGAISHI Toru MATSUMOTO Katsuyoshi MIURA Koji NAKAMAE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/03/01
Vol. E92-C  No. 3  pp. 327-333
Type of Manuscript:  INVITED PAPER (Special Section on Recent Progress in Superconducting Analog Devices and Their Applications)
Category: 
Keyword: 
SQUIDlaserLSI chipfailure analysisdefect localization
 Summary | Full Text:PDF(1.5MB)

Hierarchical Fault Tracing for VLSIs with Bi-directional Busses from CAD Layout Data in the CAD-Linked EB Test System
Katsuyoshi MIURA Koji NAKAMAE Hiromu FUJIOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3  pp. 498-502
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
bi-directional buscircuit extraction from CAD layoutelectron beam testingLSI
 Summary | Full Text:PDF(409.1KB)

Automatic Transistor-Level Performance Fault Tracing by Successive Circuit Extraction from CAD Layout Data for VLSI in the CAD-Linked EB Test System
Katsuyoshi MIURA Koji NAKAMAE hiromu FUJIOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/11/25
Vol. E78-C  No. 11  pp. 1607-1617
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
performance fault tracingcircuit extraction from CAD layoutelectron beam testingintegrated circuitsvacuum and beam technologies
 Summary | Full Text:PDF(929.7KB)

Matching of DUT Interconnection Pattern with CAD Layout in CAD-Linked Electron Beam Test System
Koji NAKAMAE Ryo NAKAGAKI Katsuyoshi MIURA Hiromu FUJIOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/04/25
Vol. E77-C  No. 4  pp. 567-573
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Failure Analysis)
Category: 
Keyword: 
vacuum and beam technologieselectron beam testingpattern matchingCAD layout
 Summary | Full Text:PDF(578.8KB)

Automatic Tracing of Transistor-Level Performance Faults with CAD-Linked Electron Beam Test System
Katsuyoshi MIURA Koji NAKAMAE Hiromu FUJIOKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/03/25
Vol. E77-A  No. 3  pp. 539-545
Type of Manuscript:  PAPER
Category: Computer Aided Design (CAD)
Keyword: 
fault analysisfault tracingelectron beam testingperformance faulttransistor-level circuits
 Summary | Full Text:PDF(538.3KB)