| Katsuhisa YAMANAKA
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Another Optimal Binary Representation of Mosaic Floorplans Katsuhisa YAMANAKA Shin-ichi NAKANO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/06/01
Vol. E98-A
No. 6
pp. 1223-1224
Type of Manuscript:
Special Section LETTER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: algorithm, coding, decoding, floorplan, mosaic floorplan, | | Summary | Full Text:PDF(136.5KB) | |
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Efficient Enumeration of All Ladder Lotteries with k Bars Katsuhisa YAMANAKA Shin-ichi NAKANO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/06/01
Vol. E97-A
No. 6
pp. 1163-1170
Type of Manuscript:
Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: algorithm, enumeration, ladder lottery, family tree, | | Summary | Full Text:PDF(716.9KB) | |
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Coding Floorplans with Fewer Bits Katsuhisa YAMANAKA Shin-ichi NAKANO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/05/01
Vol. E89-A
No. 5
pp. 1181-1185
Type of Manuscript:
Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: graphs, algorithms, | | Summary | Full Text:PDF(181.7KB) | |
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