Junji YAMADA


Skewed Multistaged Multibanked Register File for Area and Energy Efficiency
Junji YAMADA Ushio JIMBO Ryota SHIOYA Masahiro GOSHIMA Shuichi SAKAI 
Publication:   
Publication Date: 2017/04/01
Vol. E100-D  No. 4  pp. 822-837
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
superscalar processorregister filemultibanking
 Summary | Full Text:PDF(3.2MB)

Design of a Register Cache System with an Open Source Process Design Kit for 45nm Technology
Junji YAMADA Ushio JIMBO Ryota SHIOYA Masahiro GOSHIMA Shuichi SAKAI 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3  pp. 232-244
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
register fileregister cachedigital designfreePDK
 Summary | Full Text:PDF(3.2MB)

Applying Razor Flip-Flops to SRAM Read Circuits
Ushio JIMBO Junji YAMADA Ryota SHIOYA Masahiro GOSHIMA 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3  pp. 245-258
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
random variationtiming fault detection and recoverydynamic voltage and frequency scaling (DVFS)SRAM
 Summary | Full Text:PDF(2MB)