Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A
No. 12
pp. 3038-3048
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Timing Verification and Test Generation
Keyword:
delay test,
critical path,
statistical timing analysis,
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