Jianbin ZHOU


Framework and VLSI Architecture of Measurement-Domain Intra Prediction for Compressively Sensed Visual Contents
Jianbin ZHOU Dajiang ZHOU Li GUO Takeshi YOSHIMURA Satoshi GOTO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12  pp. 2869-2877
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
compressed sensingintra predictionstructured measurement matrixmeasurement-domain prediction
 Summary | Full Text:PDF(3.2MB)

High Performance VLSI Architecture of H.265/HEVC Intra Prediction for 8K UHDTV Video Decoder
Jianbin ZHOU Dajiang ZHOU Shihao WANG Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/12/01
Vol. E98-A  No. 12  pp. 2519-2527
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
HEVC/H.265 decoderintra predictionVLSI architecture8K UHDTV
 Summary | Full Text:PDF(2.2MB)

Unified Parameter Decoder Architecture for H.265/HEVC Motion Vector and Boundary Strength Decoding
Shihao WANG Dajiang ZHOU Jianbin ZHOU Takeshi YOSHIMURA Satoshi GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/07/01
Vol. E98-A  No. 7  pp. 1356-1365
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
UHDTVH.265/HEVCparameter decodermotion vectorboundary strength
 Summary | Full Text:PDF(3.6MB)