Jeong-Gun LEE

A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques
Jeong-Gun LEE  Wook SHIN  Suk-Jin KIM  Eun-Gu JUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/06/01
Vol. E93-A  No. 6  pp. 1215-1225
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
Keyword: 
multi-core,  energy/performance,  asymptotic analysis,  Amdahl's law,  Rent's rule, 
  Summary |  Full Text:PDF (2.5MB)
Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion
Eun-Gu JUNG  Jeong-Gun LEE  Sang-Hoon KWAK  Kyoung-Son JHANG  Jeong-A LEE  Dong-Soo HAR 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/12/01
Vol. E88-C  No. 12  pp. 2395-2399
Type of Manuscript: LETTER
Category: Integrated Electronics
Keyword: 
GALS,  asynchronous on-chip bus,  distributed control,  multiple-issue, 
  Summary |  Full Text:PDF (540.1KB)
Differential Value Encoding for Delay Insensitive Handshake Protocol
Eun-Gu JUNG  Jeong-Gun LEE  Kyoung-Sun JHANG  Dong-Soo HAR 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1437-1444
Type of Manuscript: Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Communications and Wireless Systems
Keyword: 
data encoding,  handshake protocol,  GALS,  crosstalk, 
  Summary |  Full Text:PDF (972.3KB)
Low Latency Four-Flop Synchronizer with the Handshake Interface
Suk-Jin KIM  Jeong-Gun LEE  Kiseon KIM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1460-1463
Type of Manuscript: Special Section LETTER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Communications and Wireless Systems
Keyword: 
synchronizer,  two-flop,  clock domain,  SoC, 
  Summary |  Full Text:PDF (447.1KB)
Design of a Mutated Adder and Its Optimization Using ILP Formulation
Jeong-Gun LEE  Jeong-A LEE  Suk-Jin KIM  Kiseon KIM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1506-1508
Type of Manuscript: Special Section LETTER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Digital Circuits and Computer Arithmetic
Keyword: 
mutated adder,  mixture of carry propagation schemes,  ILP-based optimization, 
  Summary |  Full Text:PDF (335.9KB)
A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme
Jeong-Gun LEE  Suk-Jin KIM  Jeong-A LEE  Kiseon KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4  pp. 1031-1037
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
Keyword: 
asynchronous FIFO,  wave pipeline,  linear structure,  forward latency,  throughput, 
  Summary |  Full Text:PDF (1006KB)
Procedural Constraints in the Extended RBAC and the Coloured Petri Net Modeling
Wook SHIN  Jeong-Gun LEE  Hong Kook KIM  Kouichi SAKURAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/01/01
Vol. E88-A  No. 1  pp. 327-330
Type of Manuscript: Special Section LETTER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
Coloured Petri Net,  access control,  role,  behavior, 
  Summary |  Full Text:PDF (307.4KB)
A Parallel Flop Synchronizer and the Handshake Interface for Bridging Asynchronous Domains
Suk-Jin KIM  Jeong-Gun LEE  Kiseon KIM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12  pp. 3166-3173
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
synchronizer,  two-flop,  metastability,  clock domain, 
  Summary |  Full Text:PDF (363KB)
Automatic Process-Oriented Asynchronous Control Unit Generation from Control Data Flow Graphs
Euiseok KIM  Jeong-Gun LEE  Dong-Ik LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/08/01
Vol. E84-A  No. 8  pp. 2014-2028
Type of Manuscript: PAPER
Category: VLSI Design Technology and CAD
Keyword: 
automatic asynchronous control unit generation,  process-oriented,  control data flow graphs,  signal transition graph, 
  Summary |  Full Text:PDF (1.6MB)
Test Generation for SI Asynchronous Circuits with Undetectable Faults from Signal Transition Graph Specification
Eunjung OH  Jeong-Gun LEE  Dong-Ik LEE  Ho-Yong CHOI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/06/01
Vol. E84-A  No. 6  pp. 1506-1514
Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000))
Category: 
Keyword: 
ATPG,  SI asynchronous circuits,  signal transition graph,  testing, 
  Summary |  Full Text:PDF (779.6KB)