Isamu YAMAGUCHI

A Technique to Reduce Power Consumption for a Linear Transconductor
Fujihiko MATSUMOTO  Isamu YAMAGUCHI  Akira YACHIDATE  Yasuaki NOGUCHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6  pp. 814-818
Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
analog integrated circuits,  MOS transistor,  linear transconductor,  low power technique, 
  Summary |  Full Text:PDF (457KB)
A New Linear Transconductor Combining a Source Coupled Pair with a Transconductor Using Bias-Offset Technique
Isamu YAMAGUCHI  Fujihiko MATSUMOTO  Makoto IZUMA  Yasuaki NOGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/02/01
Vol. E89-A  No. 2  pp. 369-376
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
MOS transistor,  linear transconductor,  bias-offset technique,  source-coupled pair,  mobility degradation, 
  Summary |  Full Text:PDF (1006.2KB)