Hiroshi IWATA


A Method of Path Mapping from RTL to Gate Level and Its Application to False Path Identification
Hiroshi IWATA Satoshi OHTAKE Hideo FUJIWARA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/07/01
Vol. E93-D  No. 7  pp. 1857-1865
Type of Manuscript:  PAPER
Category: Information Network
Keyword: 
false pathhigh level testingpath mappingfunctional equivalence
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