IEICE SEARCH SYSTEM

Hiroaki UENO

A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential Dondee NAVARRO Takeshi MIZOGUCHI Masami SUETAKE Kazuya HISAMITSU Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/05/01 Vol. E88-C No. 5 pp. 1079-1086 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: pinch-off region, channel-length modulation, overlap capacitance, surface-potential-based modeling, circuit simulation,
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1/f-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation Shizunori MATSUMOTO Hiroaki UENO Satoshi HOSOKAWA Toshihiko KITAMURA Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Tatsuya OHGURO Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2005/02/01 Vol. E88-C No. 2 pp. 247-254 Type of Manuscript: PAPER Category: Semiconductor Materials and Devices Keyword: 100 nm-MOSFET, 1/f noise, measurement, modeling,
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100 nm-MOSFET Model for Circuit Simulation: Challenges and Solutions Mitiko MIURA-MATTAUSCH Hiroaki UENO Hans Juergen MATTAUSCH Keiichi MORIKAWA Satoshi ITOH Akiyoshi KOBAYASHI Hiroo MASUDA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/06/01 Vol. E86-C No. 6 pp. 1009-1021 Type of Manuscript: INVITED PAPER (Special Issue on Devices and Circuits for Next Generation Multi-Media Communication Systems) Category: Keyword: MOSFET model, surface potential, device phenomena, RF applications,
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Circuit-Simulation Model of C_gd Changes in Small-Size MOSFETs Due to High Channel-Field Gradients Dondee NAVARRO Hiroaki KAWANO Kazuya HISAMITSU Takatoshi YAMAOKA Masayasu TANAKA Hiroaki UENO Mitiko MIURA-MATTAUSCH Hans Jurgen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2003/03/01 Vol. E86-C No. 3 pp. 474-480 Type of Manuscript: INVITED PAPER (Special Issue on the 2002 IEEE International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'02)) Category: Keyword: gate-drain capacitance, surface-potential based modeling, lateral field gradient, pocket-implant technology,
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Circuit Simulation Models for Coming MOSFET Generations Mitiko MIURA-MATTAUSCH Hiroaki UENO Hans Juergen MATTAUSCH Shigetaka KUMASHIRO Tetsuya YAMAGUCHI Kyoji YAMASHITA Noriaki NAKAYAMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/04/01 Vol. E85-A No. 4 pp. 740-748 Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa) Category: Keyword: MOSFET model, surface potential, charge based modeling, sub-100 nm technology,
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