Hidetsugu IRIE


Design and Evaluation of a Configurable Query Processing Hardware for Data Streams
Yasin OGE Masato YOSHIMI Takefumi MIYOSHI Hideyuki KAWASHIMA Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/12/01
Vol. E98-D  No. 12  pp. 2207-2217
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
FPGAquery processingdata streamsliding-window aggregationconfigurable hardware architecture
 Summary | Full Text:PDF(2MB)

A Fully Optical Ring Network-on-Chip with Static and Dynamic Wavelength Allocation
Ahmadou Dit Adi CISSE Michihiro KOIBUCHI Masato YOSHIMI Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/12/01
Vol. E96-D  No. 12  pp. 2545-2554
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
Network-on-Chiphigh-bandwidth and low power networkoptical interconnectwavelength allocation
 Summary | Full Text:PDF(1.1MB)

Using Cacheline Reuse Characteristics for Prefetcher Throttling
Hidetsugu IRIE Takefumi MIYOSHI Goki HONJO Kei HIRAKI Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D  No. 12  pp. 2928-2938
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Computer Architecture
Keyword: 
microarchitecturecacheprefetch
 Summary | Full Text:PDF(1.6MB)

Computation-Communication Overlap of Linpack on a GPU-Accelerated PC Cluster
Junichi OHMURA Takefumi MIYOSHI Hidetsugu IRIE Tsutomu YOSHINAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2011/12/01
Vol. E94-D  No. 12  pp. 2319-2327
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: 
Keyword: 
parallel processingmulti-core processorGPUcomputation-communication overlap
 Summary | Full Text:PDF(636.5KB)

Ultra Dependable Processor
Shuichi SAKAI Masahiro GOSHIMA Hidetsugu IRIE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/09/01
Vol. E91-C  No. 9  pp. 1386-1393
Type of Manuscript:  INVITED PAPER (Special Section on Advanced Processors Based on Novel Concepts in Computation)
Category: 
Keyword: 
microprocessor architecturedependable computingattacksfaultserrorsfailuressoft errorstiming errorstamper resistanceinformation flowinjection attackdependability manager
 Summary | Full Text:PDF(1.1MB)