Hidekazu GOTO


Recessed Memory Array Technology for a Double Cylindrical Stacked Capacitor Cell of 256M DRAM
Kazuhiko SAGARA Tokuo KURE Shoji SHUKURI Jiro YAGAMI Norio HASEGAWA Hidekazu GOTO Hisaomi YAMASHITA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/11/25
Vol. E75-C  No. 11  pp. 1313-1322
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
recessed memory arraystacked capacitor cell256 MDRAM
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