Haruki MARUOKA


A Low-Power Radiation-Hardened Flip-Flop with Stacked Transistors in a 65 nm FDSOI Process
Haruki MARUOKA Masashi HIFUMI Jun FURUTA Kazutoshi KOBAYASHI 
Publication:   
Publication Date: 2018/04/01
Vol. E101-C  No. 4  pp. 273-280
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
single event effectsoft errorα particleneutronheavy ionFDSOIflip-floplow-power consumption
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